參數(shù)資料
型號: GL9701-MXG
廠商: Genesys Logic, Inc.
英文描述: PCI ExpressTM to PCI Bridge
中文描述: 的PCI ExpressTM到PCI橋
文件頁數(shù): 28/75頁
文件大?。?/td> 1077K
代理商: GL9701-MXG
GL9701 PCI Express
TM
to PCI Bridge
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 28
5.6 IDSEL Mapping
While receiving a Type1 Configuration Cycle from the upstream PCI Express port, GL9701 will convert it
into a Type0 Configuration Cycle if the bus number is within the range specified by the Primary Bus Number
Register and the Secondary Bus Number Register.
The format of a Type0 Configuration Cycle is as followed:
GL9701 converts the destination ID device number to one of the AD[31:16] as the IDSEL of the five PCI slots.
The mapping between the AD[31:16] and Device Number is:
Device Number [4:0]
AD[31:16]
00000
0000_0000_0000_0001
00001
0000_0000_0000_0010
00010
0000_0000_0000_0100
00011
0000_0000_0000_1000
00100
0000_0000_0001_0000
00101
0000_0000_0010_0000
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