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參數(shù)資料
| 型號(hào)： | GF9331-CBP |
| 廠商： | Gennum Corporation |
| 英文描述： | DTV/SDTV Motion Co-processor |
| 中文描述： | 數(shù)字電視/標(biāo)清運(yùn)動(dòng)協(xié)處理器 |
| 文件頁(yè)數(shù)： | 5/31頁(yè) |
| 文件大?。?/td> | 337K |
| 代理商： | GF9331-CBP |
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GF9331 Data Sheet
Proprietary and Confidential
18303 - 4
June 2004
5 of 31
R_W
P3
I
Host interface Read/Write control for parallel mode. A read cycle is defined
when HIGH, a write cycle is defined when LOW.
A_D
P1
I
Host interface Address/Data control for parallel mode. The data bus contains
an address when HIGH, a data word when LOW. In serial mode, this pin
serves as the chip select (active low).
Y_OUT[9:0]
A20, B20, C20, C19, D20,
D19, D18, E20, E19, E18
O
Output data bus for separate luminance or multiplexed luminance and colour
difference video data.
C_OUT[9:0]
H20, J20, J19, J18, K20,
K19, K18, L18, L19, L20
O
Output data bus for colour difference video data.
FIL_SEL[3:0]
M19, M20, N19, N20
O
Filter selection control bus output to the GF9330. The FIL_SEL[3:0] bus is
used to switch the GF9330’s internal directional filters on a pixel by pixel basis.
H_OUT
P20
O
Output control signal. H_OUT is a horizontal blanking output.
F_OUT
T20
O
Output control signal. F_OUT is an ODD/EVEN field indicator.
V_OUT
R20
O
Output control signal. V_OUT is a vertical blanking output.
S1_CLK
Y10
O
SDRAM bank 1 clock.
S1_CS
Y5
O
Active low SDRAM chip select for Field Buffer 1.
S1_RAS
W4
O
Active low SDRAM row address strobe for Field Buffer 1.
S1_CAS
W5
O
Active low SDRAM column address strobe for Field Buffer 1.
S1_WE
Y4
O
Active low SDRAM write enable for Field Buffer 1.
S1_ADDR[13:0]
Y6, W6, V6, Y7, W7, V7,
Y8, W8, V8, Y9, W9, V9,
W10, V10
O
SDRAM address for Field Buffer 1.
S1_DAT[15:0]
V11, W11, Y11, V12, W12,
Y12, V13, W13, Y13, V14,
W14, Y14, V15, W15, Y15,
Y16
I/O
SDRAM data for Field Buffer 1.
S2_CLK
A9
O
SDRAM bank 2 clock.
S2_CS
A14
O
Active low SDRAM chip select for Field Buffer 2.
S2_RAS
B15
O
Active low SDRAM row address strobe for Field Buffer 2.
S2_CAS
B14
O
Active low SDRAM column address strobe for Field Buffer 2.
S2_WE
A15
O
Active low SDRAM write enable for Field Buffer 2.
S2_ADDR[13:0]
A13, B13, C13, A12, B12,
C12, A11, B11, C11, C10,
B10, A10, C9, B9
O
SDRAM address for Field Buffer 2.
S2_DAT[15:0]
C8, B8, A8, C7, B7, A7,
C6, B6, A6, C5, B5, A5,
B4, A4, B3, A3
I/O
SDRAM data for Field Buffer 2.
TDI
U3
I
JTAG data input; connect to GND if not used.
TMS
U2
I
JTAG mode select; connect to GND if not used.
Table 1-1: Pin Descriptions (Continued)
Symbol
Pin Grid
Type
Description
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