參數(shù)資料
型號(hào)： GF9331-CBP
廠商： Gennum Corporation
英文描述： DTV/SDTV Motion Co-processor
中文描述： 數(shù)字電視/標(biāo)清運(yùn)動(dòng)協(xié)處理器
文件頁數(shù)： 10/31頁
文件大小： 337K
代理商： GF9331-CBP
GF9331 Data Sheet
Proprietary and Confidential
18303 - 4
June 2004
10 of 31
3. Detailed Device Description
3.1 Input Data Formats
The GF9331 supports multiple input data formats with multiplexed or separate Y/C
channels. Data is supplied to the GF9331 through the Y_IN[9:0] and the C_IN[9:0]
busses.
Table 3-1: Encoding of STD[4:0] for Selecting Input Data Format
outlines
the data formats that the GF9331 supports according to the setting of STD[4:0] pins
or host interface bits, STD[4:0].
NOTE: For all progressive video standards the GF9331 must be manually set to
bypass mode (MODE=0, pin or register). See
Host Interface
for host interface
details.
Table 3-1: Encoding of STD[4:0] for Selecting Input Data Format
STD
STD[4:0]
Description
0
00000
525i (30/1.001) component SMPTE 125M. Multiplexed YCbCr data applied to Y_IN. C_IN should be set
LOW.
NOTE: Input clock is 27MHz.
1
00001
Reserved
2
00010
525i (30/1.001) component 16x9 SMPTE 267M. Multiplexed YCbCr data applied to Y_IN. C_IN should be set
LOW.
NOTE: Input clock is 36MHz.
3
00011
Reserved
4
00100
625i (25Hz) component EBU tech. 3267E. Multiplexed YCbCr data applied to Y_IN. C_IN should be set LOW.
NOTE: Input clock is 27MHz.
5
00101
Reserved
6
00110
625i (25Hz) component 16x9 ITU-R BT.601-5 Part B. Multiplexed YCbCr data applied to Y_IN. C_IN should
be set LOW.
NOTE: Input clock is 36MHz.
7
00111
Reserved
8
01000
525p (60/1.001Hz) SMPTE 293M. YCbCr data stream applied to Y_IN. C_IN should be set LOW. Timing
information is extracted from embedded TRS sequences.
NOTE: Input clock is 54MHz.
9
01001
Reserved
10
01010
Reserved
11
01011
Reserved
12
01100
625p (50Hz) ITU-R BT.1358. YCbCr data stream applied to Y_IN. C_IN should be set LOW. Timing
information is extracted from embedded TRS sequences.
NOTE: Input clock is 54MHz.
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