參數(shù)資料
型號： GF9331-CBP
廠商： Gennum Corporation
英文描述： DTV/SDTV Motion Co-processor
中文描述： 數(shù)字電視/標清運動協(xié)處理器
文件頁數(shù)： 24/31頁
文件大小： 337K
代理商： GF9331-CBP
GF9331 Data Sheet
Proprietary and Confidential
18303 - 4
June 2004
24 of 31
6
7:0
CC_BLANK_END_
LINE [7:0]
UC
Defines the last line number at which closed captioned
blanking ends. For this parameter, line 0 is defined as the
first active line of the field/frame.
00000000
15:8
CC_BLANK_START_
LINE [7:0]
UC
Defines the first line number at which closed captioned
blanking starts. For this parameter, line 0 is defined as the
first active line of the field/frame.
00000000
19
7:0
V_BLANK_SIZE_EVEN
[7:0
]
AC
Defines the number of lines that comprise the vertical
blanking interval that follows the even input field. This
parameter has a maximum value of 255.
Auto
15:8
V_BLANK_SIZE_
ODD[7:0]
AC
Defines the number of lines that comprise the vertical
blanking interval that follows the odd input field. This
parameter has a maximum value of 255.
Auto
21
12
FORMAT_SD
AC
Used to configure the GF9331 SDRAM controller into 8-bit
mode for SD video formats. This bit is auto-configured
based on the standard and mode selection.
Auto
13
PROGRESSIVE_INPUT
AC
Configures the GF9331 to accept a progressive video
format. This bit is auto-configured based on the standard
and mode selection.
Auto
15:14
ID_MODE[1:0]
AC
Defines the type of video sequence for input video
de-multiplexing. When set to "00" the input represents a
4:2:2 sequence, "01" represents a 4:1:1 sequence, and
"10" represents an HD format. This word can be
auto-configured based on the video standard and mode.
Auto
22
11:0
H_BLANK_SIZE[11:0]
AC
Defines the number of horizontal blanked input words per
line that corresponds to 2 times the number of blanking
pixels per line for 4:2:2 SD modes and is equal to the
number of pixels per line for HD formats (maximum 4095).
This value can be auto-configured.
Auto
13
FIELD2_HAS_TOP_
LINE
AC
Set HIGH when field 2, line one is the first line in the video
frame (SMPTE 260M).
Auto
15:14
EVEN_LINES_PER_
FRAME[1:0]
AC
Set to 11 for video standards that have an even number of
lines per frame such as SMPTE 295M, otherwise set to 00.
Auto
23
9:0
NO_LINE_DELAYS[9:0]
AC
Defines the number of line delays to implement within the
external
field delay. This value is auto-configured based on
the standard and mode. The calculation is:
NO_LINE_DELAYS = (Number of lines per frame - 3)/2
Auto
30
0
EXT_MEMCLK_SEL
AC
Controls the selection of the SDRAM clock source. For
VCLK_IN frequencies less than 36MHz, the internal clock
doubler can be used. In all other modes an external source
is required (MEMCLK_IN).
Auto
2
CLK_X1_SEL
AC
This parameter is normally set for all HD modes and is ‘0’
for all other cases.
Auto
Table 3-5: Control Register Definitions (Continued)
Address
Bit
Location
Register Name
Class
Description
Default
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