參數(shù)資料
型號(hào): GF9331-CBP
廠商: Gennum Corporation
英文描述: DTV/SDTV Motion Co-processor
中文描述: 數(shù)字電視/標(biāo)清運(yùn)動(dòng)協(xié)處理器
文件頁(yè)數(shù): 12/31頁(yè)
文件大?。?/td> 337K
代理商: GF9331-CBP
GF9331 Data Sheet
Proprietary and Confidential
18303 - 4
June 2004
12 of 31
3.2 Input Synchronization
The GF9331 obtains relevant timing information from either embedded TRS
information or externally supplied H_IN, V_IN sand F_IN signals.
When FVH_EN is set HIGH using either the host interface or the external pin, the
GF9331 relies on the externally supplied H_IN, V_IN and F_IN signals for timing
information. When FVH_EN is set LOW, the GF9331 extracts the embedded TRS
timing information from the video data stream and ignores any timing information
present of the F_IN, V_IN and H_IN pins.
3.2.1 Support for Both 8-bit and 10-bit Input Data
The GF9331 supports 8-bit and 10-bit input data. When operating with 8-bit input
data, the two LSBs of the GF9331’s 10-bit input bus should be set LOW and the
input data applied to the 8 MSBs of the input bus.
3.2.2 Generic Input Format Signalling
T
he GF9331 supports generic input data formats with either 4:1:1 or 4:2:2 sampling
structures that require up to 2046 active samples per line and have maximum total line
width of 4096 (active + blanking) samples. In addition, there is a limit of 2048 lines per
interlaced frame. The following host interface parameters are programmable to
describe the generic input data format relative to the F_IN, V_IN and H_IN signals.
See
Figure 3-1: Generic Input Format Definition
.
29
11101
1080p (24 & 24/1.001Hz in Segmented Frame Format) SMPTE RP211-2000. Y data applied to Y_IN. Cb Cr
data applied to C_IN.
NOTE: Input clock is 74.25MHz or 74.25/1.001MHz.
30
11110
1035i (30Hz) SMPTE 260M. Y data applied to Y_IN. Cb Cr data applied to C_IN.
NOTE: Input clock is 74.25MHz.
31
11111
Generic HD input data format with 4:2:2 sampling and a separate Y/C format. Y Data applied to Y_IN. Cb Cr
data applied to C_IN. The externally supplied F_IN, V_IN and H_IN signals are used to synchronize the input data
stream.
NOTE: Input clock is 74.25MHz or 74.25/1.00MHz.
Table 3-1: Encoding of STD[4:0] for Selecting Input Data Format (Continued)
STD
STD[4:0]
Description
相關(guān)PDF資料
PDF描述
GFMM Ceramic Capacitors Stacks
GFMM2505 Ceramic Capacitors Stacks
GFMM2507 Ceramic Capacitors Stacks
GH06510B2A RED LASER DIODE FOR DVD ROM DRIVE
GH30507T2A GH30507T2A
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GF9351A-CBE2 制造商:Sigma Designs 功能描述:IC IMAGE PROCESSOR 10BIT DUAL
GF9410\5B 功能描述:MOSFET N-Channel 30V 2A RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS(導(dǎo)通):0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube
GF9450C-CBE3 制造商:Sigma Designs 功能描述:IC VIDEO PROCESSOR 10BIT 701HSBG
GF9452A-CBE3 制造商:Sigma Designs 功能描述:IC VIDEO PROCESSOR 12BIT 725HSBG
GF9926\5B 功能描述:MOSFET USE 781-SI9926ADY RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS(導(dǎo)通):0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube