參數(shù)資料
型號(hào)： EVAL-AD7193EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 31/57頁(yè)
文件大?。?/td> 0K
描述： EVAL BOARD FOR AD7193
設(shè)計(jì)資源： EVAL-AD7193 Schematic
AD7193 Gerber Files
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 1
位數(shù)： 24
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
工作溫度： -40°C ~ 105°C
已用 IC / 零件： AD7193
已供物品： 板，線纜
AD7193
Data Sheet
Rev. D | Page 36 of 56
Continuous Conversion Mode
Continuous conversion is the default power-up mode. The
AD7193 converts continuously, and the RDY bit in the status
register goes low each time a conversion is complete. If CS is
low, the DOUT/RDY line also goes low when a conversion is
completed. To read a conversion, the user writes to the commu-
nications register, indicating that the next operation is a read of
the data register. When the data-word has been read from the
data register, DOUT/RDY goes high. The user can read this
register additional times, if required. However, the user must
ensure that the data register is not being accessed at the completion
of the next conversion or else the new conversion word is lost.
When several channels are enabled, the ADC continuously
loops through the enabled channels, performing one conversion
on each channel per loop. The data register is updated as soon
as each conversion is available. The DOUT/RDY pin pulses low
each time a conversion is available. The user can then read the
conversion while the ADC converts on the next enabled channel.
If the DAT_STA bit in the mode register is set to 1, the contents
of the status register are output along with the conversion each
time that the data read is performed. The status register indicates
the channel to which the conversion corresponds.
DIN
SCLK
DOUT/RDY
CS
0x58
DATA
08367-
062
Figure 26. Continuous Conversion
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