參數(shù)資料
型號(hào): DSD1794DBR
廠商: Texas Instruments, Inc.
英文描述: 24-BIT, 192-kHz SAMPLING, ADVANCED SEGMENT, AUDIO STRRO DIGITAL-TO-ALALOG CONVERTER
中文描述: 24位192 kHz的采樣,高級(jí)分段,音頻STRRO數(shù)字至ALALOG轉(zhuǎn)爐
文件頁(yè)數(shù): 43/47頁(yè)
文件大?。?/td> 417K
代理商: DSD1794DBR
SLES077A MARCH 2003 REVISED NOVEMBER 2003
www.ti.com
43
THEORY OF OPERATION
Analog Output
Digital Input
24 Bits
8 fS
MSB
and
Lower 18 Bits
Upper
6 Bits
ICOB
Decoder
3rd-Order
5-Level
Sigma-Delta
Advanced
DWA
Current
Segment
DAC
04
Level
062
Level
066
Figure 51. Advanced Segment DAC
The DSD1794 uses TI’s advanced segment DAC architecture to achieve excellent dynamic performance and
improved tolerance to clock jitter. The DSD1794 provides balanced current outputs.
Digital input data via the digital filter is separated into 6 upper bits and 18 lower bits. The 6 upper bits are converted
to inverted complementary offset binary (ICOB) code. The lower 18 bits, associated with the MSB, are processed
by a five-level third-order delta-sigma modulator operated at 64 f
S
by default. The 1 level of the modulator is equivalent
to the 1 LSB of the ICOB code converter. The data groups processed in the ICOB converter and third-order
delta-sigma modulator are summed together to an up to 66-level digital code, and then processed by data-weighted
averaging (DWA) to reduce the noise produced by element mismatch. The data of up to 66 levels from the DWA is
converted to an analog output in the differential-current segment section.
This architecture has overcome the various drawbacks of conventional multibit processing and also achieves
excellent dynamic performance.
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