- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376994 > DSD1794DBR (Texas Instruments, Inc.) 24-BIT, 192-kHz SAMPLING, ADVANCED SEGMENT, AUDIO STRRO DIGITAL-TO-ALALOG CONVERTER PDF資料下載
參數(shù)資料
| 型號： | DSD1794DBR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 24-BIT, 192-kHz SAMPLING, ADVANCED SEGMENT, AUDIO STRRO DIGITAL-TO-ALALOG CONVERTER |
| 中文描述： | 24位192 kHz的采樣，高級分段，音頻STRRO數(shù)字至ALALOG轉(zhuǎn)爐 |
| 文件頁數(shù)： | 21/47頁 |
| 文件大?。?/td> | 417K |
| 代理商： | DSD1794DBR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當(dāng)前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
SLES077A MARCH 2003 REVISED NOVEMBER 2003
www.ti.com
21
Transmitter
M
M
M
S
M
S
M
M
M
S
S
M
…
…
M
M
Data Type
St
Slave Address
W
ACK
Reg Address
ACK
Sr
Slave Address
R
ACK
Data
ACK
NACK
Sp
M
: Master Device
S
: Slave Device
St: Start Condition
Sr: Repeated Start Condition
ACK: Acknowledge
Sp: Stop Condition
NACK: Not Acknowledge
W: Write
R: Read
NOTE: The slave address after the repeat start condition must be the same as the previous slave address.
Figure 31. Read Operation
Noise Suppression
The DSD1794 incorporates noise suppression using the system clock (SCK). However, there must be no more than
two noise spikes in 600 ns. The noise suppression works for SCK frequencies between 8 MHz and 40 MHz in fast
mode. However, it works incorrectly in the following conditions.
Case 1:
1.
t
(SCK)
> 120 ns (t
(SCK)
: period of SCK)
2.
t
(HI)
+ t
(DHD)
< t
(SCK)
×
5
3.
Spike noise exists on the first half of the SCL HIGH pulse.
4.
Spike noise exists on the SDA HIGH pulse just before SDA goes LOW.
SCL
SDA
Noise
When these conditions occur at the same time, the data is recognized as LOW.
Case 2:
1.
t(
SCK)
> 120 ns
2.
t
(SHD)
or t
(RSHD)
< t
(SCK)
×
5
3.
Spike noise exists on both SCL and SDA during the hold time.
SCL
SDA
Noise
When these conditions occur at the same time, the DSD1794 fails to detect a start condition.
Case 3:
1.
t
(SCK)
< 50 ns
2.
t
(SP)
> t
(SCK)
3.
Spike noise exists on SCL just after SCL goes LOW.
4.
Spike noise exists on SDA just before SCL goes LOW.
SCL
SDA
Noise
When these conditions occur at the same time, the DSD1794 erroneously detects a start or stop condition.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSD2410 | |
| DSD2425 | |
| DSD2450 | |
| DLD2410 | |
| DLD2425 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSD1794DBRG4 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DSD1796 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:24BIT 192KHZ SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER |
| DSD1796DB | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit Ster Adv Seg Delta-Sig Audio DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| DSD1796DBG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24B St Adv Segment Audio DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| DSD1796DBR | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit Ster Adv Seg Delta-Sig Audio DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。