參數(shù)資料
型號: CLRC632
廠商: NXP Semiconductors N.V.
英文描述: Multiple Protocol Contactless Reader IC
中文描述: 多協(xié)議非接觸式讀卡器IC
文件頁數(shù): 155/163頁
文件大小: 948K
代理商: CLRC632
Philips Semiconductors
Product Specification Rev. 3.0; May 2003
Multiple Protocol Contactless Reader IC
CL RC632
155
Confidential
22.5.2.3 Bus Timing for EPP
SYMBOL
t
LLLH
t
AVLH
t
LHAX
t
CLSL
t
SHCH
t
SLDV,R
t
SHDZ
t
SLDV,W
t
SHDX
t
SHRX
t
SLSH
t
RVSL
t
SLWH
t
SHWL
PARAMETER
nAStrb pulse width
MIN
20
15
8
0
0
8
8
65
8
MAX
65
20
35
75
75
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Multiplexed Address Bus valid to nAStrb high (Set Up Time)
Multiplexed Address Bus valid after nAStrb high (Hold Time)
NCS low to nDStrb low
nDStrb high to NCS high
nDStrb low to DATA valid (read cycle)
nDStrb low to DATA high impedance (read cycle)
nDStrb low to DATA valid (write cycle, Set up Time)
DATA hold after nDStrb high (write cycle, Hold Time)
nWrite hold after nDStrb high
nDStrb pulse width
nWrite valid to nDStrb low
nDStrb low to nWait high
nDStrb high to nWait low
Table 22-12: Timing Specification for Common Read/Write Strobe
Remark: The figure does not distinguish between the Address Write Cycle and a Data Write Cycle. Take in
account, that timings for the Address Write and Data Write Cycle are different. For the EPP-Mode the
address lines A0 to A2 have to be connected as described in 4.3.
NCS
t
CLSL
t
SHDX
t
SHDZ
D0 ... D7
D0 ... D7
A0 ... A7
t
SLDV,R
t
SLDV,W
nDStrb
nAStrb
t
SLSH
nWrite
nWait
t
SLWH
t
SHWL
t
RVSL
t
SHRX
t
SHCH
Figure 22-3: Timing Diagram for Common Read/Write Strobe
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