參數(shù)資料
型號(hào)： CDB5530U
廠(chǎng)商： Cirrus Logic Inc
文件頁(yè)數(shù)： 17/36頁(yè)
文件大小： 0K
描述： BOARD EVAL FOR CS5530
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 1
位數(shù)： 24
采樣率（每秒）： 3.84k
數(shù)據(jù)接口： 串行
輸入范圍： ±2.5 V
在以下條件下的電源（標(biāo)準(zhǔn)）： 35mW @ 5V
工作溫度： -40°C ~ 85°C
已用 IC / 零件： CS5530
已供物品： 板，CD
相關(guān)產(chǎn)品： CS5530-ISZR-ND - IC ADC 24BIT 1CH W/LNA 20-SSOP
598-1283-5-ND - IC ADC 24BIT 1CH W/LNA 20SSOP
598-1198-5-ND - IC DELTA-SIGMA 24BIT 1CH 20-SSOP
其它名稱(chēng)： 598-1158
CS5530
24
DS742F3
2.5.2 Continuous Conversion Mode
When the user transmits the perform continuous
conversion command, the converter begins contin-
uous conversions using the word rate and polarity
selections set in the configuration register. Once
the command byte is transmitted, the serial port en-
ters data mode where it waits until a conversion is
complete. After the conversion is done, SDO falls
to logic 0 to act as a flag to indicate that the data is
available. Forty SCLKs are then needed to read the
conversion. The first 8 SCLKs are used to clear the
SDO flag. The last 32 SCLKs are needed to read
the conversion result. If ‘00000000’ is provided to
SDI during the first 8 SCLKs when the SDO flag is
cleared, the converter remains in this conversion
mode and continues to convert using the same word
rate and polarity information. In continuous con-
version mode, not every conversion word needs to
be read. The user needs only to read the conversion
words required for the application as SDO rises and
falls to indicate the availability of new conversion
data. Note that if a conversion is not read before the
next conversion data becomes available, it will be
lost and replaced by the new conversion data. To
exit this conversion mode, the user must provide
‘11111111’ to the SDI pin during the first 8 SCLKs
after SDO falls. If the user decides to exit, 32
SCLKs are required to clock out the last conversion
before the converter returns to command mode.
The number of clock cycles a continuous conver-
sion takes for each Output Word Setting is listed in
Table 2. The first conversion from the part in con-
tinuous conversion mode will be longer than the
following conversions due to start-up overhead.
The ± 8 (FRS = 0) or ± 10 (FRS = 1) clock ambigu-
ity is due to internal synchronization between the
SCLK input and the oscillator.
Note:
When changing channels, or after performing
calibrations and/or single conversions, the
user must ignore the first three (for OWRs
less than 3200 Sps, MCLK = 4.9152 MHz) or
first five (for OWR
≥ 3200 Sps) conversions in
continuous conversion mode, as residual
filter coefficients must be flushed from the
filter before accurate conversions are
performed.
Table 1. Conversion Timing for Single Mode
(WR3-WR0)
Clock Cycles
FRS = 0
FRS = 1
0000
171448 ± 8
205738 ± 10
0001
335288 ± 8
402346 ± 10
0010
662968 ± 8
795562 ± 10
0011
1318328 ± 8
1581994 ± 10
0100
2629048 ± 8
3154858 ± 10
1000
7592 ± 8
9110 ± 10
1001
17848 ± 8
21418 ± 10
1010
28088 ± 8
33706 ± 10
1011
48568 ± 8
58282 ± 10
1100
89528 ± 8
107434 ± 10
Table 2. Conversion Timing for Continuous Mode
FRS (WR3-WR0)
Clock Cycles
(First Conversion)
Clock Cycles
(All Other
Conversions)
0
0000
89528 ± 8
40960
0
0001
171448 ± 8
81920
0
0010
335288 ± 8
163840
0
0011
662968 ± 8
327680
0
0100
1318328 ± 8
655360
0
1000
2472 ± 8
1280
0
1001
12728 ± 8
2560
0
1010
17848 ± 8
5120
0
1011
28088 ± 8
10240
0
1100
48568 ± 8
20480
1
0000
107434 ± 10
49152
1
0001
205738 ± 10
98304
1
0010
402346 ± 10
196608
1
0011
795562 ± 10
393216
1
0100
1581994 ± 10
786432
1
1000
2966 ± 10
1536
1
1001
15274 ± 10
3072
1
1010
21418 ± 10
6144
1
1011
33706 ± 10
12288
1
1100
58282 ± 10
24576
相關(guān)PDF資料
PDF描述
SIP4613ADVP-T1-E3 IC LOAD SW HISIDE 1A SC75-6
CDB5534U EVAL BOARD FOR CS5534
AD9648-125EBZ EVAL BOARD AD9648-125
CDB5463U-Z EVAL BOARD USB FOR CS5463
AD9633-125EBZ BOARD EVAL FOR AD9633
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CDB5532U 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 Eval Bd 24Bit ADC w/ Ultra Low-Noise USB RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類(lèi)型:ADC 工具用于評(píng)估:ADS130E08 接口類(lèi)型:SPI 工作電源電壓:- 6 V to + 6 V
CDB5534U 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 Eval Bd 24Bit ADC w/ Ultra Low-Noise USB RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類(lèi)型:ADC 工具用于評(píng)估:ADS130E08 接口類(lèi)型:SPI 工作電源電壓:- 6 V to + 6 V
CDB5534U-Z 功能描述:EVAL BD 24-BIT ADCS W/ULTRALN PG 制造商:cirrus logic inc. 系列:- 零件狀態(tài):在售 A/D 轉(zhuǎn)換器數(shù):1 位數(shù):24 采樣率（每秒）:3.84k 數(shù)據(jù)接口:串行 輸入范圍:±2.5 V 不同條件下的功率（典型值）:35mW @ 3.84kSPS 使用的 IC/零件:CS5534 所含物品:板，電纜 標(biāo)準(zhǔn)包裝:1
CDB5540 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR CS5540 - Bulk
CDB5541 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR 5540 & 5541 N/A - Bulk 制造商:Cirrus Logic 功能描述:Tools Development kit For Use
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*