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參數(shù)資料
| 型號(hào)： | CDB5530U |
| 廠商： | Cirrus Logic Inc |
| 文件頁(yè)數(shù)： | 11/36頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR CS5530 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 3.84k |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | ±2.5 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 35mW @ 5V |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | CS5530 |
| 已供物品： | 板，CD |
| 相關(guān)產(chǎn)品： | CS5530-ISZR-ND - IC ADC 24BIT 1CH W/LNA 20-SSOP 598-1283-5-ND - IC ADC 24BIT 1CH W/LNA 20SSOP 598-1198-5-ND - IC DELTA-SIGMA 24BIT 1CH 20-SSOP |
| 其它名稱： | 598-1158 |
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CS5530
DS742F3
19
2.3.10 Configuration Register Description
PSS (Power Save Select)[31]
0
Standby Mode (Oscillator active, allows quick power-up).
1
Sleep Mode (Oscillator inactive).
PDW (Power Down Mode)[30]
0
Normal Mode
1
Activate the power save select mode.
RS (Reset System)[29]
0
Normal Operation.
1
Activate a Reset cycle. See System Reset Sequence in the datasheet text.
RV (Reset Valid)[28]
0
Normal Operation
1
System was reset. This bit is read only. Bit is cleared to logic zero after the configuration register is read.
IS (Input Short)[27]
0
Normal Input
1
All signal input pairs for each channel are disconnected from the pins and shorted internally.
NU (Not Used)[26]
0
Must always be logic 0. Reserved for future upgrades.
VRS (Voltage Reference Select)[25]
0
2.5 V < VREF ≤ [(VA+) - (VA-)]
11 V
≤ VREF ≤ 2.5V
A1-A0 (Output Latch bits)[24:23]
The latch bits (A1 and A0) will be set to the logic state of these bits when the Configuration register is written.
Note that these logic outputs are powered from VA+ and VA-.
00
A1 = 0, A0 = 0
01
A1 = 0, A0 = 1
10
A1 = 1, A0 = 0
11
A1 = 1, A0 = 1
NU (Not Used)[22:20]
0
Must always be logic 0. Reserved for future upgrades.
Filter Rate Select, FRS[19]
0
Use the default output word rates.
1
Scale all output word rates and their corresponding filter characteristics by a factor of 5/6.
NU (Not Used)[18:15]
0
Must always be logic 0. Reserved for future upgrades.
D31(MSB)
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
PSS
PDW
RS
RV
IS
NU
VRS
A1
A0
NU
FRS
NU
D15
D14
D13
D12
D11
D10
D9
D8
D7D6
D5
D4D3D2D1D0
NU
WR3
WR2
WR1
WR0 UP/BP
OCD
NUNUNUNUNUNUNUNUNU
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