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參數(shù)資料
| 型號(hào)： | BX80539T2400 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1830 MHz, MICROPROCESSOR, PBGA479 |
| 封裝： | MICRO, FCBGA-479 |
| 文件頁數(shù)： | 47/91頁 |
| 文件大?。?/td> | 2017K |
| 代理商： | BX80539T2400 |
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Datasheet
51
Package Mechanical Specifications and Pin Information
D[63:0]#
Input/
Output
D[63:0]# (Data) are the data signals. These signals provide a 64-
bit data path between the FSB agents, and must connect the
appropriate pins on both agents. The data driver asserts DRDY# to
indicate a valid data transfer.
D[63:0]# are quad-pumped signals and will thus be driven four
times in a common clock period. D[63:0]# are latched off the
falling edge of both DSTBP[3:0]# and DSTBN[3:0]#. Each group of
16 data signals correspond to a pair of one DSTBP# and one
DSTBN#. The following table shows the grouping of data signals to
data strobes and DINV#.
Furthermore, the DINV# pins determine the polarity of the data
signals. Each group of 16 data signals corresponds to one DINV#
signal. When the DINV# signal is active, the corresponding data
group is inverted and therefore sampled active high.
DBR#
Output
DBR# (Data Bus Reset) is used only in processor systems where no
debug port is implemented on the system board. DBR# is used by a
debug port interposer so that an in-target probe can drive system
reset. If a debug port is implemented in the system, DBR# is a no
connect in the system. DBR# is not a processor signal.
DBSY#
Input/
Output
DBSY# (Data Bus Busy) is asserted by the agent responsible for
driving data on the FSB to indicate that the data bus is in use. The
data bus is released after DBSY# is deasserted. This signal must
connect the appropriate pins on both FSB agents.
DEFER#
Input
DEFER# is asserted by an agent to indicate that a transaction
cannot be guaranteed in-order completion. Assertion of DEFER# is
normally the responsibility of the addressed memory or Input/
Output agent. This signal must connect the appropriate pins of both
FSB agents.
Table 17.
Signal Description (Sheet 3 of 9)
Name
Type
Description
Quad-Pumped Signal Groups
Data
Group
DSTBN#/
DSTBP#
DINV#
D[15:0]#
0
D[31:16]#
1
D[47:32]#
2
D[63:48]#
3
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