
154
Am79C978A
Note: Do not set this bit when
Auto-Negotiation is enabled
.
This bit is always read/write ac-
cessible. FDEN is reset to 0 by
H_RESET, and is unaffected by
S_RESET and the STOP bit.
BCR16: I/O Base Address Lower
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-5
IOBASEL
Reserved
H_RESET, the value of these
bits will be undefined. The set-
tings of these bits will have no
effect on any Am79C978A
controller function.
locations.
After
These bits are always read/write
accessible. IOBASEL is not af-
fected by S_RESET or STOP.
4-0
RES
Reserved locations. Written as
zeros, read as undefined.
BCR17: I/O Base Address Upper
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-0
IOBASEU
Reserved
H_RESET, the value in this regis-
ter will be undefined. The settings
of this register will have no effect
on any Am79C978A controller
function.
locations.
After
This bit is always read/write ac-
cessible. IOBASEU is not affected
by S_RESET or STOP.
BCR18: Burst and Bus Control Register
Note:
Bits 15-0 in this register are programmable
through the EEPROM.
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-12 ROMTMG
Expansion ROM Timing. The val-
ue of ROMTMG is used to tune
the timing for all EBDATA
(BCR30) accesses to Flash/
EPROM as well as all Expansion
ROM accesses to Flash/EPROM.
ROMTMG, during read opera-
tions, defines the time from when
the Am79C978A controller drives
the lower 8 or 16 bits of the Ex-
pansion Bus Address bus to
when the Am79C978A controller
latches in the data on the 8 or 16
bits of the Expansion Bus Data
inputs. ROMTMG, during write
operations, defines the time from
when the Am79C978A controller
drives the lower 8 or 16 bits of the
Expansion Bus Data to when the
EBWE and EROMCS deassert.
The register value specifies the
time in number of clock cycles +1
according to Table 37.
Note
: Programming ROMTNG
with a value of 0 is not permitted.
The access time for the Expan-
sion ROM or the EBDATA
(BCR30) device (t
ACC
) during read
operations can be calculated by
subtracting the clock to output de-
lay for the EBUA_EBA[7:0] out-
puts (t
v_A_D
) and by subtracting
the input to clock setup time for
the EBD[7:0] inputs (t
s_D
) from
the time defined by ROMTMG:
t
ACC
= ROMTMG * CLK period
*CLK_FAC - (t
v_A_D
) + (t
s_D
)
The access time for the Expan-
sion ROM or for the EBDATA
(BCR30) device (t
ACC
)
during
write operations can be calculat-
ed by subtracting the clock to out-
put delay for the EBUA EBA[7:0]
outputs
(t
v_A_D
) and by adding
the input to clock setup time for
Flash/EPRO inputs (t
s_D
) from
the time defined by ROMTMG.
t
ACC
= ROMTMG * CLK period *
CLK_FAC - (t
v_A_D
) - (t
s_D
)
Table 37.
ROMTNG Programming Values
ROMTMG (bits 15-12)
1h < = n < = Fh
No. of Expansion Bus Cycles
n + 1