參數(shù)資料
型號： AK4671
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： Stereo CODEC with MIC/RCV/HP-AMP
中文描述： 立體聲編解碼器麥克風(fēng)/垃圾車/惠普腺苷
文件頁數(shù)： 67/164頁
文件大?。?/td> 1792K
代理商： AK4671
[AK4671]
MS0666-E-00
2007/10
- 67 -
■
ALC Operation
The ALC (Automatic Level Control) is executed by ALC block when ALC bit is “1”. ALC circuit operates at playback
path for Playback mode and operates at recording path for Recording mode as shown in
Figure 60
.
1.
ALC Limiter Operation
During the ALC limiter operation, when either Lch or Rch exceeds the ALC limiter detection level (
Table 24
), the IVL
and IVR values (same value) are attenuated automatically by the amount defined by the ALC limiter ATT step (
Table 25
).
When ZELMN bit = “0” (zero cross detection is enabled), the IVL and IVR values are changed by ALC limiter operation
at the individual zero crossing points of Lch and Rch or at the zero crossing timeout. ZTM1-0 bits set the zero crossing
timeout period of both ALC limiter and recovery operation (
Table 26
). IVL and IVR values are attenuated 1 step
immediately (period: 1/fs) by ALC limiter operation when output level is over FS (Digital Full Scale). When output level
is not over FS, the IVL and IVR values are changed at the individual zero crossing points of Lch and Rch or at the zero
crossing timeout.
When ZELMN bit = “1” (zero cross detection is disabled), IVL and IVR values are immediately (period: 1/fs) changed by
ALC limiter operation. Attenuation step is fixed to 1 step regardless of the setting of LMAT1-0 bits.
The attenuation operation is done continuously until the input signal level becomes ALC limiter detection level (
Table 24
)
or less. After completing the attenuate operation, unless ALC bit is changed to “0”, the operation repeats when the input
signal level exceeds LMTH1-0 bits.
LMTH1
LMTH0
ALC Limier Detection Level
ALC Recovery Waiting Counter Reset Level
0
0
ALC Output
≥
2.5dBFS
0
1
ALC Output
≥
4.1dBFS
1
0
ALC Output
≥
6.0dBFS
1
1
ALC Output
≥
8.5dBFS
Table 24. ALC Limiter Detection Level / Recovery Counter Reset Level
ALC Limiter ATT Step
LMAT1
LMAT0
ALC Output
≥
LMTH
≥
FS
0
0
1
1
0
1
2
2
1
0
2
4
1
1
1
2
Table 25. ALC Limiter ATT Step
Zero Crossing Timeout Period
ZTM1
ZTM0
8kHz
0
0
128/fs
16ms
0
1
256/fs
32ms
1
0
512/fs
64ms
1
1
1024/fs
128ms
Table 26. ALC Zero Crossing Timeout Period
(default)
2.5dBFS > ALC Output
≥
4.1dBFS
4.1dBFS > ALC Output
≥
6.0dBFS
6.0dBFS > ALC Output
≥
8.5dBFS
8.5dBFS > ALC Output
≥
12dBFS
ALC Output
ALC Output
≥
FS + 6dB
1
2
4
4
ALC Output
≥
FS + 12dB
1
2
8
8
(default)
(default)
16kHz
8ms
16ms
32ms
64ms
44.1kHz
2.9ms
5.8ms
11.6ms
23.2ms
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