參數(shù)資料
型號： AK4671
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： Stereo CODEC with MIC/RCV/HP-AMP
中文描述： 立體聲編解碼器麥克風(fēng)/垃圾車/惠普腺苷
文件頁數(shù)： 161/164頁
文件大小： 1792K
代理商： AK4671
[AK4671]
MS0666-E-00
2007/10
- 161 -
■
Mono Line Output
OVR7-0 bits
(Addr:1BH, D7-0)
PMDAR bit
(Addr:00H, D7)
PMRO3 bit
(Addr:11H, D1)
18H
28H
ROUT3 pin
(3)
(4)
(1)
DACSR bit
(Addr:0EH, D0)
(10)
Normal Output
(6)
LOPS3 bit
(Addr:11H, D2)
(5)
>300 ms
(7)
(8)
>300 ms
(11)
L3VL1-0 bits
(Addr:11H, D7-D6)
10
01
PMSRB bit
(Addr:53H, D1)
EQ bit
(Addr:18H, D3)
0
1
0
(2)
(9)
SRMXR1-0 bits
(Addr:15H, D7-6)
00
01
Example:
PCM I/F A: Slave Mode
PCM I/F A Format : Linear, Short Frame (ADC & DAC)
Sampling Frequency: 8kHz
Digital Volume Level:
8dB
LINEOUT Volume Level:
3dB
5 band EQ: Enable
(1) Addr:11H, Data:40H
Addr:15H, Data:40H
Addr:0EH, Data:01H
(3) Addr:1BH, Data:28H
(4) Addr:11H, Data:44H
(5) Addr:53H, Data:06H
Addr:00H, Data:81H
Addr:11H, Data:46H
(6) Addr:11H, Data:42H
Playback
(7) Addr:11H, Data:46H
(8) Addr:53H, Data:04H
Addr:00H, Data:01H
Addr:11H, Data:44H
(10) Addr:0EH, Data:00H
(11) Addr:11H, Data:40H
(2) Addr:18H, Data:0AH
(9) Addr:18H, Data:02H
Figure 126. Mono Lineout Sequence
(Speaker Playback: SDTIA
→
PCM I/F A
→
SRC-B
→
EQ
→
DATT
→
DACR
→
ROUT3
→
External SPK-Amp)
<Example>
At first, clocks should be supplied according to “
Clock Set Up
” sequence. Also, SRC-B, DAC and Mono Line-Amp
should be powered-up in consideration of PLLBT lock time.
(1)
Set up the path of “SDTIA
DAC
Mono Line-Amp”: SRMXR1-0 bits = “00”
“01”, DACSR bit = “0”
“1”
Set up analog volume for Mono Line-Amp (Addr: 11H, L3VL1-0 bits)
(2)
Enable 5-band Equalizer: EQ bit = “0”
“1” (Boost amount is selected by Addr = 50H-52H.)
(3)
Set up the output digital volume (Addr: 1BH)
When OVOLC bit is “1” (default), OVL7-0 bits set the volume of both channels. After DAC is powered-up,
the digital volume changes from default value (0dB) to the register setting value by the soft transition.
(4)
Enter power-save mode of Mono Line-Amp: LOPS3 bit = “0”
“1”
(5)
Power-up SRC-B, DAC and Mono Line-Amp: PMSRB = PMDAR = PMRO3 bits = “0”
→
“1”
ROUT3 pin rise up to VCOM voltage after PMRO3 bit is changed to “1”. Rise time is 300ms(max.) at C=1
μ
F
and AVDD=3.3V.
(6)
Exit power-save mode of Mono Line-Amp: LOPS3 bit = “1”
“0”
LOPS3 bit should be set to “0” after ROUT3 pin rise up. Mono Line-Amp goes to normal operation by setting
LOPS3 bit to “0”.
(7)
Enter power-save mode of Mono Line-Amp: LOPS3 bit: “0”
“1”
(8)
Power-down SRC-B, DAC and Mono Line-Amp: PMSRB = PMDAR = PMRO3 bits = “1”
→
“0”
ROUT3 pin fall down to VSS1. Fall time is 300ms(max.) at C=1
μ
F and AVDD=3.3V.
(9)
Disable 5-band Equalizer: EQ bit = “1”
“0”
(10)
Disable the path of “DAC
Mono Line-Amp”: DACSR bit = “1”
“0”
(11)
Exit power-save mode of Mono Line-Amp: LOPS3 bit = “1”
“0”
LOPS3 bit should be set to “0” after ROUT3 pin fall down.
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