- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385091 > AK4371VN (Asahi Kasei Microsystems Co.,Ltd) DAC with built-in PLL & HP-AMP PDF資料下載
參數(shù)資料
| 型號： | AK4371VN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | DAC with built-in PLL & HP-AMP |
| 中文描述： | DAC，帶有內(nèi)置的鎖相環(huán) |
| 文件頁數(shù)： | 40/62頁 |
| 文件大小： | 842K |
| 代理商： | AK4371VN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁當(dāng)前第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁
[AK4371]
MS0596-E-00
2007/04
- 40 -
3) DAC
→
MOUT
Power Supply
PDN pin
PMVCM bit
Clock Input
(5)
SDTI pin
PMDAC bit
DAC Internal
State
PD(Power-down)
Normal Operation
PMMO bit
ATTL/R7-0 bits
00H(MUTE)
FFH(0dB)
MOUT pin
(6)
MMUTE,
ATTM3-0 bits
10H(MUTE)
0FH(0dB)
(7) GD
(8) 1061/fs
(Hi-Z)
PD
Normal Operation
00H(MUTE)
FFH(0dB)
(Hi-Z)
(7) (8)
(6)
(6)
(7) (8)
Don’t care
Don’t care
Don’t care
(1) >150ns
(2)
>0s
(4) >0s
DALM,
DARM bits
(3) >0s
Figure 31. Power-up/down sequence of DAC and MOUT (Don’t care: except Hi-Z)
(1)
When AVDD and DVDD are supplied separately, AVDD should be powered-up after DVDD rises up to 1.6V or
more. When AVDD and HVDD are supplied separately, AVDD should be powered-up at the same time or earlier
than HVDD. PDN pin should be set to “H” at least 150ns after power is supplied.
(2)
PMVCM bit should be changed to “1” after the PDN pin goes “H”.
(3)
DALM and DARM bits should be changed to “1” after the PMVCM bit is changed to “1”.
(4)
PMDAC and PMMO bits should be changed to “1” after DALM and DARM bits is changed to “1”.
(5)
External clocks (MCKI, BICK, LRCK) are needed to operate the DAC. When the PMDAC bit = “0”, these clocks
can be stopped. The MOUT buffer can operate without these clocks.
(6)
When the PMMO bit is changed, pop noise is output from MOUT pins.
(7)
Analog output corresponding to the digital input has a group delay (GD) of 22/fs(=499
μ
s@fs=44.1kHz).
(8)
The ATS bit sets the transition time of the digital attenuator. Default value is 1061/fs(=24ms@fs=44.1kHz).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4380 | 100dB 24 Bit 96KHz 2ch DAC(100dB的動態(tài)范圍，采樣率96KHz的24位音頻D/A轉(zhuǎn)換器) |
| AK4380VT | 100dB 24BIT 96kHz 2CH DAC |
| AK4382A | 112dB 192kHz 24-Bit 2ch DAC |
| AK4382 | 112dB 192kHz 24-BIT SCH DAC |
| AK4382VT | 112dB 192kHz 24-BIT SCH DAC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4372 | 制造商:AKM 制造商全稱:AKM 功能描述:DAC with built-in PLL & HP-AMP |
| AK4372ECB | 制造商:AKM 制造商全稱:AKM 功能描述:DAC with built-in PLL & HP-AMP |
| AK4372VCB | 制造商:AKM 制造商全稱:AKM 功能描述:DAC with built-in PLL & HP-AMP |
| AK4373 | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power Stereo DAC with HP/SPK-Amp |
| AK4373EN | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power Stereo DAC with HP/SPK-Amp |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。