參數(shù)資料
型號(hào): AK4371VN
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: DAC with built-in PLL & HP-AMP
中文描述: DAC,帶有內(nèi)置的鎖相環(huán)
文件頁數(shù): 25/62頁
文件大?。?/td> 842K
代理商: AK4371VN
[AK4371]
MS0596-E-00
2007/04
- 25 -
Mode
0
1
2
4
5
6
8
9
10
12
13
Others
FS3
0
0
0
0
0
0
1
1
1
1
1
FS2
0
0
0
1
1
1
0
0
0
1
1
Others
FS1
0
0
1
0
0
1
0
0
1
0
0
FS0
0
1
0
0
1
0
0
1
0
0
1
fs
MCKI
256fs
512fs
1024fs
256fs
512fs
1024fs
256fs
512fs
1024fs
384fs
768fs
N/A
(default)
8kHz
48kHz
8kHz
48kHz
8kHz
24kHz
8kHz
48kHz
8kHz
48kHz
8kHz
24kHz
8kHz
48kHz
8kHz
48kHz
8kHz
24kHz
8kHz
48kHz
8kHz
24kHz
N/A
Table 11. Relationship between Sampling Frequency and MCKI Frequency (EXT mode)
PS1
PS0
0
0
0
1
1
0
1
1
Table 12. MCKO frequency (EXT mode, MCKO bit = “1”)
MCKO
256fs
128fs
64fs
32fs
(default)
Master Mode (M/S bit = “1”)
Power Up (PMDAC bit = “1”)
Refer to Table 11
Power Down (PMDAC bit = “0”)
Input or
fixed to “L” or “H” externally
“L”
MCKI
pin
MCKO
pin
BICK
pin
LRCK
pin
MCKO bit = “0”: “L”
MCKO bit = “1”: Output
BF bit = “1”: 64fs output
BF bit = “0”: 32fs output
Output
“L”
“L”
Table 13. Clock Operation in Master mode (EXT mode)
Slave Mode (M/S bit = “0”)
Power Up (PMDAC bit = “1”)
Refer to Table 11
Power Down (PMDAC bit = “0”)
Input or
fixed to “L” or “H” externally
“L”
MCKI pin
MCKO pin MCKO bit = “0”: “L”
MCKO bit = “1”: Output
BICK pin
Input
LRCK pin
Input
Table 14. Clock Operation in Slave mode (EXT mode)
Fixed to “L” or “H” externally
Fixed to “L” or “H” externally
For low sampling rates, DR and S/N degrade because of the out-of-band noise. DR and S/N are improved by using higher
frequency for MCKI. Table 15 shows DR and S/N when the DAC output is to the HP-amp.
DR, S/N (BW=20kHz, A-weight)
MCKI
fs=8kHz
256fs/384fs/512fs
56dB
768fs/1024fs
75dB
Table 15. Relationship between MCKI frequency and DR (and S/N) of HP-amp (2.4V)
fs=16kHz
75dB
90dB
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