參數(shù)資料
型號: AD9995KCPZ
廠商: Analog Devices Inc
文件頁數(shù): 6/60頁
文件大?。?/td> 0K
描述: IC CCD SIGNAL PROCESSOR 56-LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: CCD 信號處理器,12 位
輸入類型: 邏輯
輸出類型: 邏輯
接口: 3 線串口
電流 - 電源: 30mA
安裝類型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 56-LFCSP-VQ(8x8)
包裝: 托盤
AD9995
–14–
Generating Special HBLK Patterns
There are six toggle positions available for HBLK. Normally,
only two of the toggle positions are used to generate the standard
HBLK interval. However, the additional toggle positions may be
used to generate special HBLK patterns, as shown in Figure 12.
The pattern in this example uses all six toggle positions to gen-
erate two extra groups of pulses during the HBLK interval. By
changing the toggle positions, different patterns can be created.
Generating HBLK Line Alternation
One further feature of the AD9995 is the ability to alternate dif-
ferent HBLK toggle positions on odd and even lines.This may be
used in conjunction with V-pattern odd/even alternation or on its
own.When a 1 is written to the HBLKALT register,TOG1 and
TOG2 are used on odd lines only, while TOG3–TOG6 are used
on even lines.Writing a 2 to the HBLKALT register gives the
opposite result:TOG1 and TOG2 are used on even lines, while
TOG3–TOG6 are used on odd lines. See the Vertical Timing
Generation, Line Alternation section for more information.
HD
HBLK
PROGRAMMABLE SETTINGS:
1. FIRST TOGGLE POSITION = START OF BLANKING
2. SECOND TOGGLE POSITION = END OF BLANKING
BLANK
1
2
Figure 10. Horizontal Blanking (HBLK) Pulse Placement
HD
HBLK
THE POLARITY OF H1 DURING BLANKING IS PROGRAMMABLE (H2 IS OPPOSITE POLARITY OF H1).
H1/H3
H2/H4
Figure 11. HBLK Masking Control
HBLK
SPECIAL H-BLANK PATTERN IS CREATED USING MULTIPLE HBLK TOGGLE POSITIONS.
H1/H3
H2/H4
TOG1
TOG2
TOG3
TOG4
TOG5
TOG6
Figure 12. Generating Special HBLK Patterns
REV. 0
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