參數(shù)資料
型號(hào): AD9995KCPZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 50/60頁(yè)
文件大小: 0K
描述: IC CCD SIGNAL PROCESSOR 56-LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: CCD 信號(hào)處理器,12 位
輸入類型: 邏輯
輸出類型: 邏輯
接口: 3 線串口
電流 - 電源: 30mA
安裝類型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 56-LFCSP-VQ(8x8)
包裝: 托盤
AD9995
–54–
Table XLVI.V-Sequence 9 (VSEQ9) Register Map
Data Bit Default
Address Content Value
Register Name
Description
C8
[1:0]
0
HBLKMASK_9
Masking Polarity during HBLK. H1 [0]. H3 [1].
[2]
0
CLPOBPOL_9
CLPOBPOL
CLPOB Start Polarity
[3]
0
PBLKPOL_9
PBLKPOL
PBLK Start Polarity
[7:4]
0
VPATSEL_9
VPATSEL
Selected V-Pattern Group for V-Sequence 9
[9:8]
0
VMASK_9
VMASK
Enable Masking of V-Outputs (Specified by FREEZE/RESUME Registers)
[11:10]
0
HBLKALT_9
Enable HBLK Alternation
[23:12]
0
UNUSED
Unused
C9
[11:0]
0
VPATREPO_9
Number of Selected V-Pattern Group Repetitions for Odd Lines
[23:12]
0
VPATREPE_9
Number of Selected V-Pattern Group Repetitions for Even Lines
CA
[11:0]
0
VPATSTART_9
Start Position in the Line for the Selected V-Pattern Group
[23:12]
0
HDLEN_9
HD Line Length (Number of Pixels) for V-Sequence 9
CB
[11:0]
0
PBLKTOG1_9
PBLK Toggle Position 1 for V-Sequence 9
[23:12]
0
PBLKTOG2_9
PBLK Toggle Position 2 for V-Sequence 9
CC
[11:0]
0
HBLKTOG1_9
HBLK Toggle Position 1 for V-Sequence 9
[23:12]
0
HBLKTOG2_9
HBLK Toggle Position 2 for V-Sequence 9
CD
[11:0]
0
HBLKTOG3_9
HBLK Toggle Position 3 for V-Sequence 9
[23:12]
0
HBLKTOG4_9
HBLK Toggle Position 4 for V-Sequence 9
CE
[11:0]
0
HBLKTOG5_9
HBLK Toggle Position 5 for V-Sequence 9
[23:12]
0
HBLKTOG6_9
HBLK Toggle Position 6 for V-Sequence 9
CF
[11:0]
0
CLPOBTOG1_9
CLPOB Toggle Position 1 for V-Sequence 9
[23:12]
0
CLPOBTOG2_9
CLPOB Toggle Position 2 for V-Sequence 9
Table XLVII. Field 0 Register Map
Data Bit Default
Address Content Value
Register Name
Description
D0
[3:0]
0
VSEQSEL0_0
Selected V-Sequence for Region 0.
[4]
0
SWEEP0_0
Select Sweep Region for Region 0. 0 = No Sweep, 1= Sweep.
[5]
0
MULTI0_0
Select Multiplier Region for Region 0. 0 = No Multiplier, 1 = Multiplier.
[9:6]
0
VSEQSEL1_0
Selected V-Sequence for Region 1.
[10]
0
SWEEP1_0
Select Sweep Region for Region 1. 0 = No Sweep, 1 = Sweep.
[11]
0
MULTI1_0
Select Multiplier Region for Region 1. 0 = No Multiplier, 1 = Multiplier.
[15:12]
0
VSEQSEL2_0
Selected V-Sequence for Region 2.
[16]
0
SWEEP2_0
Select Sweep Region for Region 2. 0 = No Sweep, 1 = Sweep.
[17]
0
MULTI2_0
Select Multiplier Region for Region 2. 0 = No Multiplier, 1 = Multiplier.
[21:18]
0
VSEQSEL3_0
Selected V-Sequence for Region 3.
[22]
0
SWEEP3_0
Select Sweep Region for Region 3. 0 = No Sweep, 1 = Sweep.
[23]
0
MULTI3_0
Select Multiplier Region for Region 3. 0 = No Multiplier, 1 = Multiplier.
D1
[3:0]
0
VSEQSEL4_0
Selected V-Sequence for Region 4.
[4]
0
SWEEP4_0
Select Sweep Region for Region 4. 0 = No Sweep, 1 = Sweep.
[5]
0
MULTI4_0
Select Multiplier Region for Region 4. 0 = No Multiplier, 1 = Multiplier.
[9:6]
0
VSEQSEL5_0
Selected V-Sequence for Region 5.
[10]
0
SWEEP5_0
Select Sweep Region for Region 5. 0 = No Sweep, 1 = Sweep.
[11]
0
MULTI5_0
Select Multiplier Region for Region 5. 0 = No Multiplier, 1 = Multiplier.
[15:12]
0
VSEQSEL6_0
Selected V-Sequence for Region 6.
[16]
0
SWEEP6_0
Select Sweep Region for Region 6. 0 = No Sweep, 1 = Sweep.
[17]
0
MULTI6_0
Select Multiplier Region for Region 6. 0 = No Multiplier, 1 = Multiplier.
[23:18]
UNUSED
Unused.
D2
[11:0]
0
SCP1_0
V-Sequence Change Position #1 for Field 0.
[23:12]
0
SCP2_0
V-Sequence Change Position #2 for Field 0.
D3
[11:0]
0
SCP3_0
V-Sequence Change Position #3 for Field 0.
[23:12]
0
SCP4_0
V-Sequence Change Position #4 for Field 0.
D4
[11:0]
0
VDLEN_0
VD Field Length (Number of Lines) for Field 0.
[23:12]
0
HDLAST_0
HD Line Length (Number of Pixels) for Last Line in Field 0.
REV. 0
OBSOLETE
相關(guān)PDF資料
PDF描述
ADA4424-6ARUZ IC FILTR VID6CH SD/ED/HD 38TSSOP
ADATE302-02BBCZ IC DCL ATE 500MHZ DUAL 84CSPBGA
ADATE304BBCZ IC DCL ATE 200MHZ DUAL 84CSPBGA
ADATE305BSVZ IC DCL ATE 250MHZ DUAL 100TQFP
ADAU1328BSTZ IC CODEC 24BIT 2ADC/8DAC 48LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9995KCPZRL 功能描述:IC CCD SIGNAL PROCESSOR 56-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG,串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件
AD9995KCPZRL7 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
AD9996BBCZ 制造商:Rochester Electronics LLC 功能描述:14B 40 MSPS AFETG CONVERTER - Bulk
AD9996BBCZRL 制造商:Rochester Electronics LLC 功能描述:- Bulk
AD-9FT4-B2 制造商:Pan Pacific 功能描述: