參數(shù)資料
型號(hào): AD9995KCPZ
廠商: Analog Devices Inc
文件頁數(shù): 20/60頁
文件大小: 0K
描述: IC CCD SIGNAL PROCESSOR 56-LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: CCD 信號(hào)處理器,12 位
輸入類型: 邏輯
輸出類型: 邏輯
接口: 3 線串口
電流 - 電源: 30mA
安裝類型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 56-LFCSP-VQ(8x8)
包裝: 托盤
AD9995
–27–
If the exposure is generated using the TRIGGER register and the
EXPOSURE register is set to zero, the behavior of the SUBCK
will not be any different than the normal shutter or high precision
shutter operations, in which the TRIGGER register is not used.
SUBCK Suppression
Normally, the SUBCKs will begin to pulse on the line following
the sensor gate line (VSG).With some CCDs, the SUBCK pulse
needs to be suppressed for one or more lines following the VSG
line.The SUBCKSUPPRESS register allows for suppression of
the SUBCK pulses for additional lines following the VSG line.
Readout after Exposure
After the exposure, the readout of the CCD data occurs, beginning
with the sensor gate (VSG) operation. By default, the AD9995 is
generating the VSG pulses in every field. In the case where only a
single exposure and single readout frame are needed, such as the
CCD’s preview mode, the VSG and SUBCK pulses can be oper-
ating in every field.
However in many cases, during readout the SUBCK output
needs to be further suppressed until the readout is completed.
The READOUT register specifies the number of additional
fields after the exposure to continue the suppression of
SUBCK. READOUT can be programmed for zero to seven
additional fields, and should be preprogrammed at startup,
not at the same time as the exposure write. A typical interlaced
CCD frame readout mode will generally require two additional
fields of SUBCK suppression (READOUT = 2). A 3-field,
6-phase CCD will require three additional fields of SUBCK sup-
pression after the readout begins (READOUT = 3).
If the SUBCK output is required to start back up during the last
field of readout, simply program the READOUT register to one
less than the total number of CCD readout fields.
Like the exposure operation, the readout operation must be trig-
gered by using the TRIGGER register.
Using the TRIGGER Register
As described previously, by default the AD9995 will output the
SUBCK and VSG signals on every field.This works well for
continuous single field exposure and readout operations, such
as the CCD’s live preview mode. However, if the CCD requires
a longer exposure time, or if multiple readout fields are needed,
the TRIGGER register is needed to initiate specific exposure and
readout sequences.
Typically, the exposure and readout bits in the TRIGGER
register are used together.This will initiate a complete exposure-
plus-readout operation. Once the exposure has been completed,
the readout will automatically occur.The values in the EXPO-
SURE and READOUT registers will determine the length of
each operation.
VD
SUBCK
NOTES
1. SUBCK MAY BE SUPPRESSED FOR MULTIPLE FIELDS BY PROGRAMMING THE EXPOSURE REGISTER GREATER THAN ZERO.
2. ABOVE EXAMPLE USES EXPOSURE = 1.
3. TRIGGER REGISTER MUST ALSO BE USED TO START THE LOW SPEED EXPOSURE.
4. VD/HD OUTPUTS MAY ALSO BE SUPPRESSED USING THE VDHDOFF REGISTER = 1.
t
EXP
VSG
TRIGGER
EXPOSURE
Figure 28. Low Speed Shutter Mode Using EXPOSURE Register
Table XI. Shutter Mode Register Parameters
Register
Length
Range
Description
TRIGGER
5b
On/Off for Five Signals
Trigger for VSUB [0], MSHUT [1], STROBE [2], Exposure [3],
and Readout Start [4]
READOUT
3b
0–7 # of Fields
Number of Fields to Suppress SUBCK after Exposure
EXPOSURE
12b
0–4095 # of Fields
Number of Fields to Suppress to SUBCK and VSG during
Exposure Time (Low Speed Shutter)
VDHDOFF
1b
On/Off
Disable VD/HD Output during Exposure (1 = On, 0 = Off)
SUBCKPOL*
1b
High/Low
SUBCK Start Polarity for SUBCK1 and SUBCK2
SUBCK1TOG*
24b
0–4095 Pixel Locations
Toggle Positions for First SUBCK Pulse (Normal Shutter)
SUBCK2TOG*
24b
0–4095 Pixel Locations
Toggle Positions for Second SUBCK Pulse in Last Line
(High Precision)
SUBCKNUM*
12b
1–4095 # of Pulses
Total Number of SUBCKs per Field at One Pulse per Line
SUBCKSUPPRESS*
12b
0–4095 # of Pulses
Number of Lines to Further Suppress SUBCK after the VSG Line
*Register is not VD updated, but is updated at the start of line after sensor gate line.
REV. 0
OBSOLETE
相關(guān)PDF資料
PDF描述
ADA4424-6ARUZ IC FILTR VID6CH SD/ED/HD 38TSSOP
ADATE302-02BBCZ IC DCL ATE 500MHZ DUAL 84CSPBGA
ADATE304BBCZ IC DCL ATE 200MHZ DUAL 84CSPBGA
ADATE305BSVZ IC DCL ATE 250MHZ DUAL 100TQFP
ADAU1328BSTZ IC CODEC 24BIT 2ADC/8DAC 48LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9995KCPZRL 功能描述:IC CCD SIGNAL PROCESSOR 56-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG,串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件
AD9995KCPZRL7 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
AD9996BBCZ 制造商:Rochester Electronics LLC 功能描述:14B 40 MSPS AFETG CONVERTER - Bulk
AD9996BBCZRL 制造商:Rochester Electronics LLC 功能描述:- Bulk
AD-9FT4-B2 制造商:Pan Pacific 功能描述: