
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 4: Reset
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
4-9
4.
Register Denitions
Table 1: RESET Module
Bit
Symbol
Acces
s
Value
Description
Reset Module
Offset 0x06,0000
RST_CTL
31:3
Unused
W
-
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
2
DO_SW_RST
W
0
0 = No action
1 = Do Software Reset.
1
REL_SYS_RST_OUT
W
0
0 = No action
1 = Release System Reset of External Peripherals.
0
ASSERT_SYS_RST_O
UT
W
0
0 = No action
1 = Do System Reset of External Peripherals.
Offset 0x06,0004
RST_CAUSE
Remark: RST_CTL is set on every time an hardware or software reset occurs.
31:2
Unused
-
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
1:0
RST_CAUSE
R
N/A
Reset Cause register:
00 = Cause is External System Reset, RESET_IN_N.
01 = Cause is Software System Reset.
10 = Cause is External System Reset, POR_IN_N
11 = Cause is watchdog time-out.
Note if multiple resets occur then only the one that is highest in the
above order will be registered. As an example RESET_IN_N (00)
and POR_IN_N (10) are both asserted. A read would return “10”
Offset 0x06,0008
WATCHDOG_COUNT
31:0
WATCHDOG_COUNT
R/W
0
Value to count to in order to either assert an interrupt (interrupt
mode) or a reset (non interrupt mode)
Offset 0x06,000C
INTERRUPT_COUNT
31:0
INTERRUPT_COUNT
R/W
0
Value to count to after the interrupt is asserted before asserting the
system reset
Offset 0x06,0FE0
INTERRUPT STATUS
31:1
Unused
R/W
-
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
0
WATCHDOG_INTERRU
PT
R
0
1: watchdog interrupt is asserted
Offset 0x06,0FE4
INTERRUPT_ENABLE
31:1
Unused
R/W
-
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
0
WATCHDOG_INTERRU
PT_ENABLE
R/W
0
1: interrupt enabled
0: interrupt NOT enabled
Offset 0x06,0FE8
INTERRUPT_CLEAR
31:1
Unused
R/W
-
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.