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參數(shù)資料
| 型號： | 84C300A |
| 廠商： | LSI Corporation |
| 英文描述： | 4-Port Fast Ethernet Controller(四端口快速以太網(wǎng)控制器) |
| 中文描述： | 4端口快速以太網(wǎng)控制器（四端口快速以太網(wǎng)控制器） |
| 文件頁數(shù)： | 35/56頁 |
| 文件大小： | 523K |
| 代理商： | 84C300A |
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84C300A 4-Port
Fast Ethernet Controller
4-35
MD400152/E
3.7 COUNTERS
CRC Error Counter
This is a 16 bit read only counter that counts the number
of frames received or discarded with CRC errors but no
framing errors. Upon reaching ts maximum count value of
FFFF hex, this counter will stop counting. To read this
counter, two consecutive reads need to be performed to
the same address location. The first read, reads out the
high byte followed by the second, that will read out the ow
byte. Upon reading he high byte, he count value of he ow
byte is frozen to prevent the low byte count value from
rolling over before it is read. Normally, once the low byte
has been read the counter is reset to zero. Should the
84C300A attempt to increment the counter while it is
frozen, then reading the low byte of the counter causes it
to be oaded with 0001 hex thereby preventing the counter
from missing a count.
Runt Frame Counter
This is a 16 bit read only counter that counts the number
of frames received or discarded less than the minimum
valid frame time (64 bytes). Upon reaching its maximum
count value of FFFF hex, his counter will stop counting. To
read this counter, two consecutive reads need to be
performed to the same address location. The first read,
reads out the high byte followed by the second, that will
read out the low byte. Upon reading the high byte, the
count value of the ow byte s frozen to prevent the ow byte
count value from rolling over before it is read. Normally,
once the low byte has been read the counter is reset to
zero. Should the 84C300A attempt to increment the
counter while it is frozen, then reading the low byte of the
counter causes it to be loaded with 0001 hex thereby
preventing the counter from missing a count.
Receive Oversize Frame Counter
This is a 8-bit counter that counts the number of receive
frames with greater than the 1518 byte maximum frame
size of data. Upon reaching ts maximum count value of FF
hex, this counter will stop counting. During reading of this
counter the count value will be frozen to prevent incre-
menting while being read. Should the 84C300A attempt to
increment the counter while it is frozen, then the counter
will be loaded with 01 hex upon completion of the read.
Otherwise, completing the read will reset the counter to 00
hex.
Alignment Error Counter
This is a 16 bit read only counter that counts the number
of frames received or discarded with a framing error and a
CRC error both. Upon reaching its maximum count value
of FFFF hex, this counter will stop counting. To read this
counter, two consecutive reads need to be performed to
the same address location. The first read, reads out the
high byte followed by the second, that will read out the low
byte. Upon reading he high byte, he count value of he ow
byte is frozen to prevent the low byte count value from
rolling over before it is read. Normally, once the low byte
has been read the counter is reset to zero. Should the
84C300A attempt to increment the counter while it is
frozen, then reading the low byte of the counter causes it
to be oaded with 0001 hex thereby preventing the counter
from missing a count.
Transmit Collision Counter
This s a 16 bit read only counter. Bits 15 through 11 of this
counter count the number of retransmission attempts a
packet required before being transmitted successfully.
Bits 10 through 0 count the number of transmit collisions a
port has experienced. Upon reaching its maximum count
value of FFFF hex, this counter will stop counting. To read
this counter, two consecutive reads need to be performed
to the same address ocation. The first read, reads out the
high byte followed by the second, that will read out the low
byte. Upon reading he high byte, he count value of he ow
byte is frozen to prevent the low byte count value from
rolling over before it is read. Normally, once the low byte
has been read the counter is reset to zero. Should the
84C300A attempt to increment the counter while it is
frozen, then reading the low byte of the counter causes it
to be oaded with 0001 hex thereby preventing the counter
from missing a count.
Receive Collision Counter
This is a 16 bit read only counter that counts the number
of collisions other than transmit collisions. All the receive
collisions counted should occur beyond the SQE test
window. It is important to note that this counter gets
incremented only when the collision input is asserted by
the PHY device when the MAC device is not transmitting
data. Upon reaching its maximum count value of FFFF
hex, this counter will stop counting. To read this counter,
two consecutive reads need to be performed to the same
address location. The first read, reads out the high byte
followed by the second, that will read out the low byte.
Upon reading the high byte, the count value of the ow byte
is frozen to prevent the low byte count value from rolling
over before t s read. Normally, once he ow byte has been
read the counter is reset to zero. Should the 84C300A
attempt to increment the counter while it is frozen, then
reading the low byte of the counter causes it to be loaded
with 0001 hex hereby preventing he counter rom missing
a count.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 84CNQ035 | Schottky Rectifier |
| 84CNQ040 | Schottky Rectifier |
| 84CNQ045 | Schottky Rectifier |
| 85-005A-0C | Signal Conditioner |
| 85-005A-0CT | Signal Conditioner |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 84C30A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:84C30A 10 Mbps Controller (MAC) manual 12/96 |
| 84C3A-A12-J06 | 制造商:BOURNS 制造商全稱:Bourns Electronic Solutions 功能描述:83/84 - 5/8 Square 10-Turn |
| 84C3A-A12-J06L | 制造商:BOURNS 制造商全稱:Bourns Electronic Solutions 功能描述:83/84 - 5/8 Square 10-Turn |
| 84C3A-A12-J08L | 制造商:BOURNS 制造商全稱:Bourns Electronic Solutions 功能描述:83/84 - 5/8 Square 10-Turn |
| 84C3A-A12-J10L | 制造商:BOURNS 制造商全稱:Bourns Electronic Solutions 功能描述:83/84 - 5/8 Square 10-Turn |
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