
Zoran ZR36506 USBV ision – Datasheet
Zoran Proprietary and Confidential
4-6
Register Bank ( Control and Status)
EEPR OM R ead/ W rite R egisters
Register
Address
Register
Name
Function
Default
Value
14
15
EE_DATA
EE_LSBAD
d7-d0: EEPROM byte to be Written/Read.
d7-d0: 8-LSbits of byte address in EEPROM.
00H
00H
16
EE_CONT
d2-d0: 3-MSbits of byte address in EEPROM.
d3:
d4:
EE_DIR ('0' = Write, '1' = Read).
EE_GO/EE_BUSY.
d7-d5: EE_CLK_FORCE (This field is Read-
Only)
00H or
xxx0000
(when no
EPROM)
S DR AM and Memory Buffer S etup R egisters
Register
Address
Register
Name
Function
Default
Value
18
DRM_CONT d0:
REF ('0' = 8.2 ms, refresh rate).
d1:
Enable operation of SDRAM. The bit
SDRAM_EN is Reset to ‘0’ by Reset, Suspend or
Power-Down events. User should write ‘1’ to
enable SDRAM after these events, allowing for at
least 100 uSec after Power-Up.
d2:
d3:
d4:
RES_UR Restart video out buffer read logic.
RES_FDL Restart video-frame-delay logic.
RES_VDW Restart video out buffer write logic.
d5-d7: reserved.
00H
19
DRM_PRM1 d0-d3: Bits 19-16 of FDL_LST_WORD.
d4-d7: reserved.
00H
20
DRM_PRM2 d0-d3: Bits 11-8 of FDL_1ST_ROW.
d4-d7: reserved.
00H
21
DRM_PRM3 d0-d3: Bits 11-8 of VDW_LST_ROW.
d4-d7: Bits 11-8 of VDW_1ST_ROW.
00H
22
DRM_PRM4 d7-d0: Bits 7-0 of FDL_1ST_ROW parameter.
00H
23
DRM_PRM5 d7-d0: Bits 7-0 of FDL_LST_WORD parameter.
00H
24
DRM_PRM6 d7-d0: Bits 15-8 of FDL_LST_WORD parameter.
00H
25
DRM_PRM7 d7-d0: Bits 7-0 of VDW_1ST_ROW parameter.
00H