參數(shù)資料
型號: XRT83VSH38IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA225
封裝: 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225
文件頁數(shù): 69/76頁
文件大?。?/td> 722K
代理商: XRT83VSH38IB
XRT83VSH38
66
REV. 1.0.7
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
D2
BYTEsel
LCV Counter Byte Select
This bit is used to select the MSB or LSB for Reading the contents
of the LCV counter for a given channel. The channel is addressed
by using bits D[3:0] in register 0x8Ch. By default, the LSB byte is
selected.
0 = Low Byte
1 = High Byte
R/W
0
D1
chUPDATE
LCV Counter Update Per Channel
This bit is used to latch the contents of the counter for a given
channel into a holding register so that the value of the counter can
be read. The channel is addressed by using bits D[3:0] in register
0x8Ch.
0 = Normal Operation
1 = Updates the Selected Channel
R/W
0
D0
chRESET
LCV Counter Reset Per Channel
This bit is used to reset the LCV counter of a given channel to its
default state 0000h. The channel is addressed by using bits D[3:0]
in register 0x8Ch. This bit must be set to "1" for 1
μ
S.
0 = Normal Operation
1 = Resets the Selected Channel
R/W
0
T
ABLE
43: M
ICROPROCESSOR
R
EGISTER
0
X
8E
H
B
IT
D
ESCRIPTION
G
LOBAL
R
EGISTER
(0
X
8E
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D7
D6
D5
D4
D3
D2
D1
D0
LCVCNT7
LCVCNT6
LCVCNT5
LCVCNT4
LCVCNT3
LCVCNT2
LCVCNT1
LCVCNT0
Line Code Violation Byte Contents
These bits contain the LCV counter contents of the Byte selected
by bit D2 in register 0x8Dh for a given channel. The channel is
addressed by using bits D[3:0] in register 0x8Ch. By default, the
contents contain the LSB, however no channel is selected..
R/W
0
0
0
0
0
0
0
0
T
ABLE
42: M
ICROPROCESSOR
R
EGISTER
0
X
8D
H
B
IT
D
ESCRIPTION
G
LOBAL
R
EGISTER
(0
X
8D
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
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