- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376463 > XRT83VSH38IB (EXAR CORP) 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT PDF資料下載
參數(shù)資料
| 型號： | XRT83VSH38IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PBGA225 |
| 封裝： | 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225 |
| 文件頁數(shù)： | 23/76頁 |
| 文件大小： | 722K |
| 代理商： | XRT83VSH38IB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁
XRT83VSH38
20
REV. 1.0.7
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
3.0
RECEIVE PATH LINE INTERFACE
The receive path of the XRT83VSH38 LIU consists of 8 independent T1/E1/J1 receivers. The following section
describes the complete receive path from RTIP/RRING inputs to RCLK/RPOS/RNEG outputs. A simplified
block diagram of the receive path is shown in
Figure 5
.
F
IGURE
5. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
R
ECEIVE
P
ATH
3.1
Line Termination (RTIP/RRING)
3.1.1
CASE 1: Internal Termination
The input stage of the receive path accepts standard T1/E1/J1 twisted pair or E1 coaxial cable inputs through
RTIP and RRING. The physical interface is optimized by placing the terminating impedance inside the LIU.
This allows one bill of materials for all modes of operation reducing the number of external components
necessary in system design. The receive termination impedance is selected by programming TERSEL[1:0] to
match the line impedance. Selecting the internal impedance is shown in
Table 3
.
The XRT83VSH38 has the ability to switch the internal termination to "High" impedance by programming
RxTSEL in the appropriate channel register. For internal termination, set RxTSEL to "1". By default, RxTSEL
is set to "0" ("High" impedance). For redundancy applications, a dedicated hardware pin (RxTSEL) is also
available to control the receive termination for all channels simultaneously. This hardware pin takes priority
over the register setting if RxTCNTL is set to "1" in the appropriate global register. If RxTCNTL is set to "0", the
state of this pin is ignored. See
Figure 6
for a typical connection diagram using the internal termination.
F
IGURE
6. T
YPICAL
C
ONNECTION
D
IAGRAM
U
SING
I
NTERNAL
T
ERMINATION
T
ABLE
3: S
ELECTING
THE
I
NTERNAL
I
MPEDANCE
TERSEL[1:0]
R
ECEIVE
T
ERMINATION
0h (00)
100
1h (01)
110
2h (10)
75
3h (11)
120
HDB3/B8ZS
Decoder
Rx Jitter
Attenuator
Clock & Data
Recovery
Peak Detector
& Slicer
RTIP
RRING
RCLK
R
TIP
R
RING
XRT83VSH38 LIU
1:1
Internal Impedance
Line Interface T1/E1/J1
One Bill of Materials
Receiver
Input
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT84L14 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT84L18 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT84L38 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT84L38_06 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT84L38IB | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83VSH38IB-F | 功能描述:外圍驅(qū)動器與原件 - PCI 8 Channel Short-Haul RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83VSH38IB-F | 制造商:Exar Corporation 功能描述:T1/E1 LIU IC |
| XRT84L38 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER |
| XRT84L38_06 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER |
| XRT84L38IB | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 8 Ch T1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。