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參數(shù)資料
| 型號(hào)： | XRT83VSH38IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PBGA225 |
| 封裝： | 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225 |
| 文件頁(yè)數(shù)： | 25/76頁(yè) |
| 文件大?。?/td> | 722K |
| 代理商： | XRT83VSH38IB |
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XRT83VSH38
22
REV. 1.0.7
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
3.2
Clock and Data Recovery
The receive clock (RCLK) is recovered by the clock and data recovery circuitry. An internal PLL locks on the
incoming data stream and outputs a clock that’s in phase with the incoming signal. This allows for multi-
channel T1/E1/J1 signals to arrive from different timing sources and remain independent. In the absence of an
incoming signal, RCLK maintains its timing by using the internal master clock as its reference. The recovered
data can be updated on either edge of RCLK. By default, data is updated on the rising edge of RCLK. To
update data on the falling edge of RCLK, set RCLKE to "1" in the appropriate global register.
Figure 8
is a
timing diagram of the receive data updated on the rising edge of RCLK.
Figure 9
is a timing diagram of the
receive data updated on the falling edge of RCLK. The timing specifications are shown in
Table 5
.
F
IGURE
8. R
ECEIVE
D
ATA
U
PDATED
ON
THE
R
ISING
E
DGE
OF
RCLK
F
IGURE
9. R
ECEIVE
D
ATA
U
PDATED
ON
THE
F
ALLING
E
DGE
OF
RCLK
N
OTE
:
VDD=3.3V ±5%, T
A
=25°C, Unless Otherwise Specified
3.2.1
Receive Sensitivity
T
ABLE
5: T
IMING
S
PECIFICATIONS
FOR
RCLK/RPOS/RNEG
P
ARAMETER
S
YMBOL
M
IN
T
YP
M
AX
U
NITS
RCLK Duty Cycle
R
CDU
45
50
55
%
Receive Data Setup Time
R
SU
150
-
-
ns
Receive Data Hold Time
R
HO
150
-
-
ns
RCLK to Data Delay
R
DY
-
-
40
ns
RCLK Rise Time (10% to 90%)
with 25pF Loading
RCLK
R
-
-
40
ns
RCLK Fall Time (90% to 10%)
with 25pF Loading
RCLK
F
-
-
40
ns
RCLK
RPOS
or
RNEG
R
DY
RCLK
R
RCLK
F
R
OH
RCLK
RPOS
or
RNEG
R
DY
RCLK
F
RCLK
R
R
OH
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| XRT84L14 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT84L18 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT84L38 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83VSH38IB-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 8 Channel Short-Haul RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83VSH38IB-F | 制造商:Exar Corporation 功能描述:T1/E1 LIU IC |
| XRT84L38 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER |
| XRT84L38_06 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER |
| XRT84L38IB | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 8 Ch T1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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