參數(shù)資料
型號: XRT83VSH38IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA225
封裝: 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225
文件頁數(shù): 62/76頁
文件大小: 722K
代理商: XRT83VSH38IB
XRT83VSH38
59
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.7
T
ABLE
29: M
ICROPROCESSOR
R
EGISTER
0
X
08
H
B
IT
D
ESCRIPTION
C
HANNEL
0-7 (0
X
08
H
-0
X
78
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used
X
0
D6
D5
D4
D3
D2
D1
D0
1SEG6
1SEG5
1SEG4
1SEG3
1SEG2
1SEG1
1SEG0
Arbitrary Pulse Generation
The transmit output pulse is divided into 8 individual segments.
This register is used to program the first segment which corre-
sponds to the overshoot of the pulse amplitude. There are four
segments for the top portion of the pulse and four segments for the
bottom portion of the pulse. Segment number 5 corresponds to
the undershoot of the pulse. The MSB of each segment is the sign
bit.
Bit 6 = 0 = Negative Direction
Bit 6 = 1 = Positive Direction
R/W
0
0
0
0
0
0
0
T
ABLE
30: M
ICROPROCESSOR
R
EGISTER
0
X
09
H
B
IT
D
ESCRIPTION
C
HANNEL
0-7 (0
X
09
H
-0
X
79
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used
X
0
D[6:0]
2SEG[6:0]
Segment Number Two, Same Description as Register 0x08h
R/W
T
ABLE
31: M
ICROPROCESSOR
R
EGISTER
0
X
0A
H
B
IT
D
ESCRIPTION
C
HANNEL
0-7 (0
X
0A
H
-0
X
7A
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used
X
0
D[6:0]
3SEG[6:0]
Segment Number Three, Same Description as Register 0x08h
R/W
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