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參數(shù)資料
| 型號： | XRT82L38 |
| 廠商： | Exar Corporation |
| 英文描述： | Octal E1/T1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(八 T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）) |
| 中文描述： | 八進(jìn)制E1/T1/J1線收發(fā)器時鐘恢復(fù)和抖動衰減器（八的T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）） |
| 文件頁數(shù)： | 9/54頁 |
| 文件大?。?/td> | 356K |
| 代理商： | XRT82L38 |
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XRT82L38
OCTAL E1/T1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.0.5
7
49
ALE_AS
ECB
I
I
Address Latch Input(Address Strobe):
With Intel bus timing, the address inputs are latched into the internal register
on the falling edge of ALE. When configured in Motorola bus timing, the
address inputs are latched into the internal register on the falling edge of AS.
Transmit Equalizer Control B:
In Hardware Mode, this pin together with ECA and ECC is used for controlling
transmit pulse shaping and also selects T1 or E1 Mode of operation.
50
CS
ECC
I
I
Chip Select Input:
This signal must be "Low" in order to access the parallel port.
Transmit Equalizer Control C:
In Hardware Mode, this pin together with ECA and ECB is used for controlling
transmit pulse shaping and also selects T1 or E1 Mode of operation.
51
RDY_DTACK
TXJA
O
I
Ready Output(Data Transfer Acknowledge Output):
With Intel bus timing, RDY is asserted "High" to indicate the device has com-
pleted a read or write operation. When configured in Motorola bus timing,
DTACK is asserted "Low" to indicate the device has completed a read or write
cycle.
Transmit Jitter attenuator Select:
In Hardware Mode, connect this pin "High" to select jitter attenuator in the
transmit path and connect "Low" to disable jitter attenuator.
N
OTE
:
Setting RXJA and TXJA "High" simultaneously disables the jitter atten-
uator.
52
INT
RXJA
O
I
Interrupt Output:
This pin is asserted "Low" to indicate an alarm condition has occurred within
the device. Interrupt generation can be globally disabled by setting the GIE
bit to a "0" in the command control register.
This pin is an open drain output and requires an external 10K
pull-up resis-
tor.
Receive Jitter attenuator Select:
In Hardware Mode, connect this pin "High" to select jitter attenuator in the
receive path and connect "Low" to disable jitter attenuator.
N
OTE
:
Setting RXJA and TXJA "High" simultaneously disables the jitter atten-
uator.
53
WR_R/W
FIFOS
I
I
Write Input(Read/Write):
With Intel bus timing, a "Low" pulse on WR selects a write operation when CS
pin is "Low". When configured in Motorola bus timing, a "High" pulse on R/W
selects a read operation and a "Low" pulse on R/W selects a write operation
when CS is "Low".
FIFO Size Select:
In Hardware Mode, connect this pin "High" to select 6
bit FIFO size and connect this pin "Low" to select 32 bit FIFO size.
N
OTE
:
Internally pulled
“
High
”
with a 50K
resistor.
54
VDD
****
Digital Positive Supply(3.3V± 5%)
55
MCLK
I
Master Clock Input:
This signal is an independent 2.048MHz clock for E1 and 1.544MHz clock for
T1 system with accuracy better than ±50ppm and duty cycle within 40% to
60%. The function of MCLK is to provide internal timing for the PLL clock
recovery circuit, jitter attenuator block, reference clock during transmit all
ones data and timing reference for the microprocessor in Host Mode opera-
tion. MCLK clock must be present at all times for the device to operate.
PIN DESCRIPTION
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
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| XRT83D10 | SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
| XRT83D10IW | SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
| XRT83L314 | 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT |
| XRT83L314IB | 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83D10 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
| XRT83D10ES | 功能描述:外圍驅(qū)動器與原件 - PCI 1 CHT1/E1LIUSH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83D10IW | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83D10IW-F | 功能描述:外圍驅(qū)動器與原件 - PCI Single Ch; 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83D10IWTR | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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