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參數(shù)資料
| 型號： | XRT82L38 |
| 廠商： | Exar Corporation |
| 英文描述： | Octal E1/T1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(八 T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）) |
| 中文描述： | 八進制E1/T1/J1線收發(fā)器時鐘恢復(fù)和抖動衰減器（八的T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）） |
| 文件頁數(shù)： | 42/54頁 |
| 文件大?。?/td> | 356K |
| 代理商： | XRT82L38 |
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XRT82L38
OCTAL E1/T1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.0.5
PRELIMINARY
40
Microprocessor Interface I/0 Timing
Intel Interface Timing
The signals used for the Intel microprocessor inter-
face are: Address Latch Enable (ALE), Read Enable
(RD), Write Enable (WR), Chip Select (CS), Address
and Data bits. The microprocessor interface uses
minimum external glue logic and is compatible with
the timings of the 8051 or 80C188 with an 8-16 MHz
clock frequency, and with the timings of x86 or I960
family or microprocessors. The interface timing
shown in Figure 19 and Figure 20 is described in
Table 20.
T
ABLE
19: C
HANNEL
C
ONTROL
R
EGISTER
C
HANNEL
C
ONTROL
R
EGISTER
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
0: 00100
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
1: 00111
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
2: 01010
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
3: 01101
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
4: 10100
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
5: 10111
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
6: 11010
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
7: 11101
B
IT
N
O
.
S
YMBOL
F
UNCTION
R
EGISTER
T
YPE
R
ESET
V
ALUE
7
6
5
ECCn
ECBn
ECAn
These 3 control bits are used to control the transmit pulse
shape for T1 and E1 operations. See Table 2 for details.
R/W
R/W
R/W
0
0
0
4
LLOOPn
Local Loop-Back: Writing a "1" to this bit enables Analog
Local Loop-Back. Simultaneously setting RLOOP High is
not allowed.
R/W
0
3
DLOOPn
Digital Loop-Back: Writing a "1" to this bit enables Digital
Loop-Back.
R/W
0
2
RLOOPn
Remote Loop-Back: Writing a "1" to this bit enables
Remote Loop-back. Simultaneously setting LLOOP High
is not allowed.
R/W
0
1
TAOSn
Transmit All Ones: Writing a "1" to this bit enables the All
Ones AMI signal to be transmitted to the line.
R/W
0
0
TxOFFn
Transmitter Off: Writing a "1" to this bit powers down the
transmitter and places the corresponding output driver in
a high impedance mode.
R/W
0
NOTE: n=channel number 0 to 7
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