參數(shù)資料
型號(hào)： XRT82L38
廠商： Exar Corporation
英文描述： Octal E1/T1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(八 T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器）)
中文描述： 八進(jìn)制E1/T1/J1線收發(fā)器時(shí)鐘恢復(fù)和抖動(dòng)衰減器（八的T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器））
文件頁(yè)數(shù)： 4/54頁(yè)
文件大?。?/td> 356K
代理商： XRT82L38
XRT82L38
OCTAL E1/T1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.0.4
PRELIMINARY
II
Figure 13. XRT82L38 Channel 0 - E1 120 W balanced application ................................................... 23
Figure 14. XRT82L38 Channel 0 - DS1 100 W Balanced application ................................................ 24
T
ABLE
3: E1 R
ECEIVER
E
LECTRICAL
C
HARACTERISTICS
............................................................................ 25
T
ABLE
4: T1 R
ECEIVER
E
LECTRICAL
C
HARACTERISTICS
............................................................................ 26
T
ABLE
5: E1 T
RANSMITTER
E
LECTRICAL
C
HARACTERISTICS
...................................................................... 27
T
ABLE
6: T1 T
RANSMITTER
E
LECTRICAL
C
HARACTERISTICS
...................................................................... 27
T
ABLE
7: T
RANSMIT
P
ULSE
M
ASK
S
PECIFICATION
..................................................................................... 28
Figure 15. ITU G.703 E1 Pulse Template ............................................................................................. 28
T
ABLE
8: DS1 I
NTERFACE
I
SOLATED
PULSE
MASK
AND
CORNER
POINTS
. ................................................... 29
Figure 16. DSX-1 Pulse Template ......................................................................................................... 29
T
ABLE
9: DC E
LECTRICAL
C
HARACTERISTICS
........................................................................................... 30
T
ABLE
10: P
OWER
D
ISSIPATION
(XRT82L38
ONLY
) ................................................................................. 30
T
ABLE
11: P
OWER
C
ONSUMPTION
(XRT82L38
AND
L
OAD
: P
D
=V
DD
X
I
DD
) .............................................. 30
ABSOLUTE MAXIMUM RATINGS ................................................................................... 31
T
ABLE
12: AC E
LECTRICAL
C
HARACTERISTICS
......................................................................................... 31
Figure 17. Transmit Clock and Input Data Timing .............................................................................. 32
Figure 18. Receive Clock and Output Data Timing. ........................................................................... 32
MICROPROCESSOR INTERFACE ......................................................................................................... 32
T
ABLE
13: M
ICROPROCESSOR
INTERFACE
SIGNAL
..................................................................................... 33
T
ABLE
14: M
ICROPROCESSOR
R
EGISTER
M
AP
........................................................................................... 34
T
ABLE
15: C
OMMAND
C
ONTROL
R
EGISTER
0 ............................................................................................. 36
T
ABLE
16: C
OMMAND
C
ONTROL
R
EGISTER
1 ............................................................................................. 37
T
ABLE
17: C
HANNEL
S
TATUS
B
IT
R
EGISTER
............................................................................................. 38
T
ABLE
18: C
HANNEL
A
LARM
M
ASK
R
EGISTER
........................................................................................... 39
T
ABLE
19: C
HANNEL
C
ONTROL
R
EGISTER
................................................................................................ 40
Figure 19. Intel Interface Timing (Read) .............................................................................................. 41
Figure 20. Intel Interface Timing (Write) .............................................................................................. 41
T
ABLE
20: I
NTEL
I
NTERFACE
T
IMING
S
PECIFICATIONS
................................................................................ 42
Motorola Interface Timing.........................................................................................................................................................42
Figure 21. Microprocessor Interface Timing - Motorola Type Programmed I/O Read Operation .. 43
Figure 22. Microprocessor Interface Timing - Motorola Type Programmed I/O Write Operation .. 43
Figure 23. Microprocessor Interface Timing - Reset Pulse Width .................................................... 43
T
ABLE
21: M
OTOROLA
I
NTERFACE
T
IMING
S
PECIFICATION
......................................................................... 44
Jitter Tolerance in DS1 applications..........................................................................................................................................45
Figure 24. Input Jitter Tolerance performance of the XRT82L38, for DS1 Applications, with the Jitter
Attenuator Disabled ............................................................................................................... 45
J
ITTER
A
TTENUATOR
E
NABLED
AND
C
ONFIGURED
TO
O
PERATE
IN
THE
R
ECEIVE
P
ATH
................................. 46
Figure 25. Input Jitter Tolerance Capability of the XRT82L38 for DS1 Applications with the Jitter At-
tenuator Enabled and operating in the Receive Path ......................................................... 46
J
ITTER
T
RANSFER
C
HARACTERISTICS
OF
THE
XRT82L38
CONFIGURED
TO
OPERATE
IN
THE
DS1 M
ODE
....... 47
Figure 26. Jitter Transfer Characteristics of the XRT82L38 for DS1 Applications with the Jitter At-
tenuator Enabled and Operating in the Receive Path ........................................................ 47
ORDERING INFORMATION ............................................................................................. 48
PACKAGE DIMENSIONS ................................................................................................. 48
R
EVISION
H
ISTORY
..................................................................................................................................... 49
APPENDIX A .................................................................................................................... 50
XRT82L38 E
VALUATION
K
IT
(XRT82L38) .................................................................................................. 50
Figure 27. XRT82L38 GUI Software Interface for Evaluating the XRT82L38 Evaluation Board ..... 50
Figure 28. Photograph of the XRT82L38 EValuation Board .............................................................. 51
Figure 29. Block Layout of the XRT82L38 Evaluation Board ............................................................ 52
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