
XRT82L38
OCTAL E1/T1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.0.4
I
TABLE OF CONTENTS
GENERAL DESCRIPTION .................................................................................................. 1
F
EATURES
................................................................................................................................................... 1
A
PPLICATIONS
.............................................................................................................................................. 1
Figure 1. Block Diagram of the XRT82L38 ............................................................................................ 1
Figure 2. Pin Out of the XRT82L38 ........................................................................................................ 2
ORDERING INFORMATION ............................................................................................... 2
TABLE OF CONTENTS .................................................................................................................................... I
PIN DESCRIPTIONS ........................................................................................................... 3
SYSTEM-FUNCTIONAL DESCRIPTION .......................................................................... 15
R
ECEIVER
.................................................................................................................................................. 15
J
ITTER
A
TTENUATOR
.................................................................................................................................. 15
HDB3/B8ZS D
ECODER
.............................................................................................................................. 15
R
ECEIVER
L
OSS
OF
S
IGNAL
(LOS) ............................................................................................................. 15
C
LOCK
SIGNALS
GENERATED
WHEN
LOS
IS
DECLARED
................................................................................ 15
D
ECLARING
AND
C
LEARING
LOS
IN
THE
DS1 M
ODE
. .................................................................................. 16
C
ONDITIONS
FOR
DECLARING
AND
CLEARING
LOS
IN
THE
E1 M
ODE
. ........................................................... 16
R
ECEIVE
D
ATA
M
UTING
.............................................................................................................................. 16
LOOP-BACK MODES .............................................................................................................................. 16
R
EMOTE
L
OOP
-
BACK
(RLOOP) .................................................................................................................. 16
D
IGITAL
L
OOP
-
BACK
(DLOOP) ................................................................................................................... 17
A
NALOG
L
OOP
-
BACK
(ALOOP) .................................................................................................................. 17
Figure 3. Remote Loop-Back with jitter attenuator selected in receive path .................................. 17
Figure 4. Remote Loop-Back with jitter attenuator selected in transmit path ................................ 17
Figure 5. Digital Local Loop-Back with option to transmit all “ones” to the line (JA selected and in
receive path) .......................................................................................................................... 18
................................................................................................................................................................. 18
................................................................................................................................................................. 18
Figure 6. Digital Local Loop-Back with option to transmit all “ones” to the line (JA selected and in
transmit path) ........................................................................................................................ 18
................................................................................................................................................................. 18
Figure 7. Analog Local Loop-Back signal flow jitter attenuator selected and in receive path ...... 18
................................................................................................................................................................. 19
Figure 8. Analog Local Loop-Back signal flow jitter attenuator selected and in transmit path .... 19
R
ESET
O
PERATION
.................................................................................................................................... 19
R
ECEIVER
M
ODES
OF
O
PERATION
.............................................................................................................. 19
R
ECEIVE
D
ATA
I
NVERT
M
ODE
..................................................................................................................... 19
Figure 9. Data changes on rising edge of Clk and Data is sampled on falling edge ...................... 19
Figure 10. Data changes on falling edge of Clk and is sampled on rising edge ............................. 19
T
RANSMIT
C
LOCK
S
AMPLING
E
DGE
............................................................................................................. 20
SINGLE
RAIL
, D
UAL
RAIL
.............................................................................................................................. 20
T
RANSMIT
A
LL
O
NES
(TAOS) .................................................................................................................... 20
HDB3/B8ZS/AMI E
NCODER
...................................................................................................................... 20
T
RANSMIT
P
ULSE
S
HAPER
.......................................................................................................................... 20
D
RIVER
M
ONITOR
....................................................................................................................................... 20
TRANSMIT
OFF
CONTROL
........................................................................................................................... 20
G.772 P
ROTECTED
M
ONITORING
................................................................................................................ 20
JTAG B
OUNDARY
S
CAN
............................................................................................................................. 21
Figure 11. Diagram of the Implementation of IEEE 1149.1 ............................................................... 21
T
ABLE
1: E
XAMPLES
OF
B8ZS E
NCODING
................................................................................................ 22
T
ABLE
2: T
RANSMIT
E
QUALIZER
C
ONTROL
................................................................................................ 22
I
NTERFACING
THE
XRT82L38
TO
THE
L
INE
................................................................................................. 22
Figure 12. XRT82L38 Channel 0 in an E1 unbalanced 75 W application ......................................... 23