PIN DESCRIPTIONS (BY FUNCTION) TRANSM" />
參數(shù)資料
型號: XRT73L03BIV
廠商: Exar Corporation
文件頁數(shù): 56/61頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 3CH 120LQFP
標準包裝: 72
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 120-LQFP
供應商設備封裝: 120-LQFP(14x20)
包裝: 托盤
XRT73L03B
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
4
PIN DESCRIPTIONS (BY FUNCTION)
TRANSMIT INTERFACE
PIN #NAME
TYPE
DESCRIPTION
29
10
20
TTIP_0
TTIP_1
TTIP_2
O
Transmit TTIP Output - Channel (n):
The XRT73L03B uses this pin along with TRing_(n) to transmit a bipolar
line signal via a 1:1 transformer.
27
12
18
TRing_0
TRing_1
TRing_2
O
Transmit Ring Output - Channel (n):
The XRT73L03B uses this pin along with TTIP_(n) to transmit a bipolar
line signal via a 1:1 transformer.
34
3
25
TxClk_0
TxClk_1
TxClk_2
I
Transmit Clock Input for TPData and TNData - Channel (n):
This input pin must be driven at 34.368 MHz for E3 applications, 44.736
MHz for DS3 applications, or 51.84 MHz for SONET STS-1 applications.
The XRT73L03B uses this signal to sample the TPData_(n) and
TNData_(n) input pins. By default, the XRT73L03B is configured to
sample these two pins on the falling edge of this signal.
NOTE: If the XRT73L03B is operating in the HOST Mode, then the
device can be configured to sample the TPData_(n) and TNData_(n)
input pins on either the rising or falling edge of TxClk_(n).
33
2
24
TPData_0
TPData_1
TPData_2
I
Transmit Positive Data Input - Channel (n):
The XRT73L03B samples this pin on the falling edge of TxClk_(n). If the
device samples a "1", then it generates and transmits a positive polarity
pulse to the line.
The data should be applied to this input pin if the Transmit Section is
configured to accept Single-Rail data from the Terminal Equipment.
NOTE: If the XRT73L03B is operating in the HOST Mode, then the
XRT73L03B can be configured to sample the TPData_(n) pin on either
the rising or falling edge of TxClk_(n).
32
1
23
TNData_0
TNData_1
TNData_2
I
Transmit Negative Data Input - Channel (n):
The XRT73L03B samples this pin on the falling edge of TxClk_(n). If the
device samples a "1", then it generates and transmits a negative polarity
pulse to the line.
In Single-Rail Mode, this pin must be tied to GND to enable the HDB3/
B3ZS Encoder and Decoder, (internally pulled-down).
In Dual-Rail Mode this input is the N-Rail Data input.
NOTE: If the XRT73L03B is operating in the HOST Mode, then the
XRT73L03B can be configured to sample the TNData_(n) pin on either
the rising or falling edge of TxClk_(n).
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