參數(shù)資料
型號(hào)： XRT73L03BIV
廠(chǎng)商： Exar Corporation
文件頁(yè)數(shù)： 5/61頁(yè)
文件大?。?/td> 0K
描述： IC LIU E3/DS3/STS-1 3CH 120LQFP
標(biāo)準(zhǔn)包裝： 72
類(lèi)型： 線(xiàn)路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 3/3
規(guī)程： DS3，E3，STS-1
電源電壓： 3.135 V ~ 3.465 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 120-LQFP
供應(yīng)商設(shè)備封裝： 120-LQFP（14x20）
包裝： 托盤(pán)
XRT73L03B
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
11
MICROPROCESSOR INTERFACE
PIN #
NAME
TYPE
DESCRIPTION
61
CS/
(ENDECDIS)
I
Microprocessor Serial Interface - Chip Select Input/Encoder-
Decoder Disable Input:
This pin’s functionality depends on whether the XRT73L03B is operating
in the HOST or Hardware Mode.
HOST Mode - Chip Select Input
The Local Microprocessor must assert this pin (set it to "0") in order to
enable communication with the XRT73L03B via the Microprocessor
Serial Interface.
NOTE: This pin is internally pulled “High".
Hardware Mode - Encoder/Decoder Disable Input
Setting this input pin "High" disables the B3ZS/HDB3 Encoder &
Decoder blocks in the XRT73L03B and configures it to transmit and
receive the line signal in an AMI format.
Setting this input pin "Low" enables the B3ZS/HDB3 Encoder & Decoder
blocks and configures it to ransmit and receive the line signal in the
B3ZS format for STS-1/DS3 operation or in the HDB3 format for E3
operation.
NOTE: If the XRT73L03B is operating in the Hardware Mode, this pin
setting configures the B3ZS/HDB3 Encoder and Decoder Blocks for all
Channels.
63
SDI/(RxOFF_0)
I
Serial Data Input for the Microprocessor Serial Interface/Receiver
Shut OFF Input - Channel 0:
The function of this input pin depends on whether the XRT73L03B is
operating in the HOST Mode or in the Hardware Mode.
HOST Mode - Serial Data Input for the Microprocessor Serial Inter-
face:
To read or write data into the Command Registers over the Microproces-
sor Serial Interface, apply the Read/Write bit, the Address Values of the
Command Registers and Data Value to be written during Write Opera-
tions to this pin.
This input is sampled on the rising edge of the SClk pin.
Hardware Mode - Channel 0 Receiver Shut OFF Input:
Setting this input pin “High” shuts off the Channel 0 receiver. Setting this
input pin “Low” enables the Receive Section for full operation.
62
SClk/(RxOFF_1)
I
Microprocessor Serial Interface Clock Signal/Receiver Shut OFF
Input - Channel 1:
The function of this pin depends on whether the XRT73L03B is operating
in the HOST Mode or in the Hardware Mode.
HOST Mode - Microprocessor Serial Interface Clock Signal:
This signal is used to sample the data on the SDI pin on the rising edge
of this signal. Additionally, during Read operations the Microprocessor
Serial Interface updates the SDO output on the falling edge of this sig-
nal.
Hardware Mode - Receiver Shut OFF input - Channel 1:
Setting this input pin "High" shuts off the Channel 1 receiver. Setting this
input pin "Low" enables the Receive Section for full operation.
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