參數(shù)資料
型號(hào)： XRT73L03BIV
廠商： Exar Corporation
文件頁(yè)數(shù)： 29/61頁(yè)
文件大?。?/td> 0K
描述： IC LIU E3/DS3/STS-1 3CH 120LQFP
標(biāo)準(zhǔn)包裝： 72
類(lèi)型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 3/3
規(guī)程： DS3，E3，STS-1
電源電壓： 3.135 V ~ 3.465 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 120-LQFP
供應(yīng)商設(shè)備封裝： 120-LQFP（14x20）
包裝： 托盤(pán)
XRT73L03B
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
33
Set the TxLEV_(n) bit-field to "1" as illustrated below.
2.4.3
Design Guideline for Setting the Transmit
Line Build-Out Circuit
The TxLEV_(n) input pins or bit-fields should be set
based upon the overall cable length between the
Transmitting Terminal and the Digital Cross Connect
system where the pulse template measurements are
made.
If the cable length between the Transmitting Ter-
minal and the DSX-3 or STSX-1 is less than 225
feet, enable the Transmit Line Build-Out circuit by
setting the TxLEV_(n) input pin or bit-field to "0".
NOTE: In this case, the configured channel outputs shaped
(e.g., not square-wave) pulses onto the line via its TTIP_(n)
and TRing_(n) output pins. The shape of this output pulse
is such that it complies with the pulse template require-
ments even when subjected to cable loss ranging from 0 to
225 feet.
If the cable length between the Transmitting Ter-
minal and the DSX-3 or STSX-1 is greater than 225
feet, disable the Transmit Line Build-Out circuit
by setting the TxLEV_(n) input pin or bit-field to
"1".
NOTE: In this case, the configured channel outputs partially
shaped pulses onto the line via the TTIP_(n) and TRing_(n)
output pins. The cable loss that these pulses experience
over long cable lengths (e.g., greater than 225 feet) cause
these pulses to be properly shaped and comply with the
appropriate pulse template requirement.
2.4.4
The Transmit Line Build-Out Circuit and
E3 Applications
The ITU-T G.703 Pulse Template Requirements for
E3 states that the E3 transmit output pulse should be
measured at the Secondary Side of the Transmit Out-
put Transformer for Pulse Template compliance. In
other words, there is no Digital Cross Connect Sys-
tem pulse template requirement for E3. Consequent-
ly, the Transmit Line Build-Out circuit within a given
Channel is disabled whenever that channel has been
configured to operate in the E3 Mode.
2.5
INTERFACING THE TRANSMIT SECTIONS OF THE
XRT73L03B TO THE LINE
The E3, DS3 and SONET STS-1 specification docu-
ments all state that line signals transmitted over coax-
ial cable are to be terminated with 75 Ohm resistor.
Interface the Transmit Section of the XRT73L03B in
the manner illustrated in Figure 21.
COMMAND REGISTER, CR1-(n)
D4
D3
D2
D1
D0
TxOFF_(n)
TAOS_(n)
TxClkINV_(n)
TxLEV_(n)
TxBIN_(n)
0X
X
1X
FIGURE 21. RECOMMENDED SCHEMATIC FOR INTERFACING THE TRANSMIT SECTION OF THE XRT73L03B TO
THE
LINE
R1
31.6
R2
31.6
Channel (n)
TxPOS_(n)
TxNEG_(n)
TxLineClk_(n)
TTIP_(n)
TRing_(n)
TPData_(n)
TNData_(n)
TxClk_(n)
Only One Channel Shown
1:1
J1
BNC
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