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參數(shù)資料
| 型號： | XRT73L03BIV |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 26/61頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E3/DS3/STS-1 3CH 120LQFP |
| 標(biāo)準(zhǔn)包裝： | 72 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 3/3 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 120-LQFP |
| 供應(yīng)商設(shè)備封裝： | 120-LQFP（14x20） |
| 包裝： | 托盤 |
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XRT73L03B
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
30
2.3.2
HDB3 Encoding
If the XRT73L03B is configured to operate in the E3
Mode, then the HDB3/B3ZS Encoder blocks operate
in the HDB3 Mode. When the Encoder is operating in
this mode, it parses through and searches the Trans-
mit Data Stream from the Transmit Logic Block for the
occurrence of four (4) consecutive zeros (e.g.,
"0000"). If the HDB3 Encoder finds an occurrence of
four consecutive zeros, then it substitutes these four
"0’s", with either a "000V" or a "B00V" pattern. The
HDB3 Encoder decides whether to substitute with ei-
ther the "000V" or the "B00V" pattern in order to in-
sure that an odd number of bipolar pulses exist be-
tween any two consecutive violation pulses.
Figure 18 illustrates the HDB3 Encoder at work with
two separate strings of four (or more) consecutive ze-
ros.
2.3.3
Disabling the HDB3/B3ZS Encoder
The XRT73L03B HDB3/B3ZS Encoder can be dis-
abled by two methods.
a. Operating in the Hardware Mode.
The HBD3/B3ZS Encoder blocks of all channels
are disabled by setting the ENDECDIS (Encoder/
Decoder Disable) input pin to “1".
NOTE: By executing this step the HDB3/B3ZS Encoder and
Decoder blocks in all channels of the XRT73L03B are glo-
bally disabled.
a. Operating in the HOST Mode.
When the XRT73L03B is operating in the HOST
Mode the HDB3/B3ZS Encoders in each channel can
be individually enabled or disabled. Disable the
HDB3/B3ZS Encoder block in Channel(n) by setting
the ENDECDIS(n) bit-field in Command Register
(CR2-(n)), to "1"
FIGURE 17. AN EXAMPLE OF B3ZS ENCODING
TClk
TPOS
SR data
Encoded
PDATA
Encoded
NDATA
10
0
1
01
0
1
0
00
1
0
1
0
1
0
00
1
00
01
0
00
0
1
11
1
000
00
0
1
0
01
1
10
1
0
10
1
0
1
Line signal
BV
0
V
0
FIGURE 18. AN EXAMPLE OF HDB3 ENCODING
TClk
TPOS
SR data
Encoded
PDATA
Encoded
NDATA
10
0
1
01
00
1
0
00
1
0
1
0
1
0
00
1
00
01
0
00
0
1
11
1
0
000
00
0
1
0
01
1
10
1
0
10
1
0
1
Line signal
BV
0
V
0
COMMAND REGISTER CR2-(n)
D4
D3
D2
D1
D0
Reserved
ENDECDIS_(n)
ALOSDIS_(n)
DLOSDIS_(n)
REQEN_(n)
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相關(guān)代理商/技術(shù)參數(shù) |
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| XRT73L03BIV-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT73L03IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 LINE INTERFCE UNIT |
| XRT73L03IVS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XRT73L04A | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04AIV | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
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