參數(shù)資料
型號(hào)： XRT73L03BIV
廠商： Exar Corporation
文件頁(yè)數(shù)： 51/61頁(yè)
文件大?。?/td> 0K
描述： IC LIU E3/DS3/STS-1 3CH 120LQFP
標(biāo)準(zhǔn)包裝： 72
類(lèi)型： 線(xiàn)路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 3/3
規(guī)程： DS3，E3，STS-1
電源電壓： 3.135 V ~ 3.465 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 120-LQFP
供應(yīng)商設(shè)備封裝： 120-LQFP（14x20）
包裝： 托盤(pán)
XRT73L03B
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
53
(n) = 0, 1 or 2. The associated addresses for each
channel are presented in , (repeated as Table 7).
NOTE: The default value for each of the bit-fields within
these register is "0".
5.2
DESCRIPTION OF BIT-FIELDS FOR EACH COM-
MAND
REGISTER
5.2.1
Command Register - CR0-(n)
The bit-format and default values for Command Reg-
ister CR0-(n) are listed below followed by the function
of eah of these bit-fields.
Bit D4 - RLOL_(n) (Receive Loss of Lock Status -
Channel(n))
This Read-Only bit-field reflects the lock status of the
Channel(n) Clock Recovery Phase-Locked-Loop
This bit-field is set to “0” if the Channel(n) Clock Re-
covery PLL is in lock with the incoming line signal.
This bit-field is set to "1" if the Clock Recovery PLL is
out of lock with the incoming line signal.
Bit D3 - RLOS_(n) (Receive Loss of Signal Status -
Channel(n))
This Read-Only bit-field indicates whether or not the
Channel(n) of the Receiver is currently declaring an
LOS (Loss of Signal) Condition.
This bit-field is set to "0" if Channel(n) is not currently
declaring the LOS Condition.
This bit-field is set to "1" if Channel(n) is declaring an
LOS Condition.
Bit D2 - ALOS_(n) (Analog Loss of Signal Status -
Channel(n))
This Read-Only bit-field indicates whether or not the
Channel(n) Analog LOS Detector is currently declar-
ing an LOS condition.
This bit-field is set to "0" if the Analog LOS Detector
within Channel(n) is NOT currently declaring an LOS
condition. This bit-field is set to "1" if the Analog LOS
Detector is currently declaring an LOS condition.
NOTE: The purpose is to isolate the Detector (e.g., either
the Analog LOS or the Digital LOS detector) that is declar-
ing the LOS condition. This feature may be useful for trou-
bleshooting/debugging purposes
Bit D1 - DLOS_(n) (Digital Loss of Signal Status -
Channel(n))
This Read-Only bit-field indicates whether or not the
Channel(n) Digital LOS Detector is currently declar-
ing an LOS condition.
This bit-field is set to "0" if the Channel(n) Digital LOS
Detector is NOT currently declaring an LOS condi-
tion. This bit-field is set to "1" if the Channel(n) Digital
LOS Detector is currently declaring an LOS condition.
NOTE: The purpose is to isolate the Detector (e.g., either
the Analog LOS or the Digital LOS detector) that is declar-
ing the LOS condition. This feature may be useful for trou-
bleshooting/debugging purposes.
Bit D0 - DMO_(n) (Drive Monitor Output Status -
Channel(n))
This Read-Only bit-field reflects the status of the
DMO output pin.
5.2.2
Command Register CR1
The bit-format and default values for Command Reg-
ister CR1-(n) are listed below followed by the function
of each of these bit-fields..
Bit D4 - TxOFF_(n) (Transmitter OFF - Channel(n))
This Read/Write bit-field is used to turn off the Chan-
nel(n) Transmitter.
Writing a "1" to this bit field turns off the Transmitter
and tri-state the Transmit Output. Writing a "0" to this
bit-field turns on the Transmitter.
Bit D3 - TAOS_(n) (Transmit All OneS - Chan-
nel(n))
This Read/Write bit-field is used to command the
Channel(n) Transmitter to generate and transmit an
all “1’s” pattern onto the line.
Writing a "1" to this bit-field commands the Transmit-
ter to transmit an all “1’s” pattern onto the line. Writ-
ing a "0" to this bit-field commands normal operation.
Bit D2 - TxClkINV_(n) (Transmit Clock Invert -
Channel(n))
This Read/Write bit-field is used to configure the
Transmitter to sample the signal at the TPData and
TNData pins on the rising edge or falling edge of Tx-
Clk (the Transmit Line Clock signal).
Writing a "1" to this bit-field configures the Transmitter
to sample the TPData and TNData input pins on the
rising edge of TxClk. Writing a “0" to this bit-field con-
COMMAND REGISTER CR0-(n)
D4
D3
D2
D1
D0
RLOL_(n) RLOS_(n) ALOS_(n) DLOS_(n) DMO_(n)
1
111
COMMAND REGISTER CR1-(n)
D4
D3
D2
D1
D0
TxOFF_(n) TAOS_(n) TxClkINV_(n) TxLEV_(n) TxBIN_(n)
0
000
0
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