參數(shù)資料
型號： XE8807AMI026TLF
廠商： Semtech
文件頁數(shù)： 99/143頁
文件大小： 0K
描述： IC MCU LOW PWR MTP FLASH 32-TQFP
標(biāo)準(zhǔn)包裝： 1
系列： XE880x
應(yīng)用： 感測機(jī)
核心處理器： Coolrisc816?
程序存儲器類型： 閃存（11 kB）
控制器系列： XE8000
RAM 容量： 512 x 8
接口： UART，USRT
輸入/輸出數(shù)： 24
電源電壓： 2.4 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 32-TQFP
包裝： 標(biāo)準(zhǔn)包裝
供應(yīng)商設(shè)備封裝： 32-TQFP（7x7）
產(chǎn)品目錄頁面： 585 (CN2011-ZH PDF)
配用： XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
其它名稱： XE8807AMI026DKR
Semtech 2006
www.semtech.com
9-2
XE8806A/XE8807A
9.1
Features
The XE8000 chips support 8 event sources, divided into 2 levels of priority.
9.2
Overview
An event is different from an interrupt in that it does not modify the program counter (PC). Events are used by two
microcontroller instructions.
First of all, events are useful to wake-up the microcontroller when it is in HALT. The software execution then simply
resumes at the instruction next to the HALT instruction. The second instruction is the conditional jump on event
(JEV). The jump is executed if one of the event flags in the stat register is set. In all other cases, the occurrence of
an event has no effect.
The event handler allows 8 event sources to be managed individually. The 8 event sources are divided into 2 levels
of priority: High (4 event sources) and Low (4 event sources). Those 2 levels of priority are directly mapped to
those supported by the CoolRisc (EV0and IN1; see CoolRisc documentation for more information).
Additional functions are given that allow fast detection of the highest priority event that has been activated.
9.3
Register map
The addresses given in Table 9-1 are the default values and may be different in some products.
Register name
RegEvn
RegEvnEn
RegEvnPriority
RegEvnEvn
Table 9-1: EVN handler registers.
pos.
RegEvn
rw
reset
function
7
RegEvn[7]
r
c1
0 nresetglobal
event #7 (high priority)
clear event #7 when written 1
6
RegEvn[6]
r
c1
0 nresetglobal
event #6 (high priority)
clear event #6 when written 1
5
RegEvn[5]
r
c1
0 nresetglobal
event #5 (high priority)
clear event #5 when written 1
4
RegEvn[4]
r
c1
0 nresetglobal
event #4 (high priority)
clear event #4 when written 1
3
RegEvn[3]
r
c1
0 nresetglobal
event #3 (low priority)
clear event #3 when written 1
2
RegEvn[2]
r
c1
0 nresetglobal
event #2 (low priority)
clear event #2 when written 1
1
RegEvn[1]
r
c1
0 nresetglobal
event #1 (low priority)
clear event #1 when written 1
0
RegEvn[0]
r
c1
0 nresetglobal
event #0 (low priority)
clear event #0 when written 1
Table 9-2: RegEvn
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