- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄1974 > XE8807AMI026TLF (Semtech)IC MCU LOW PWR MTP FLASH 32-TQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | XE8807AMI026TLF |
| 廠商： | Semtech |
| 文件頁(yè)數(shù)： | 33/143頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU LOW PWR MTP FLASH 32-TQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | XE880x |
| 應(yīng)用： | 感測(cè)機(jī) |
| 核心處理器： | Coolrisc816? |
| 程序存儲(chǔ)器類(lèi)型： | 閃存（11 kB） |
| 控制器系列： | XE8000 |
| RAM 容量： | 512 x 8 |
| 接口： | UART，USRT |
| 輸入/輸出數(shù)： | 24 |
| 電源電壓： | 2.4 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（7x7） |
| 產(chǎn)品目錄頁(yè)面： | 585 (CN2011-ZH PDF) |
| 配用： | XE8000MP-ND - PROG BOARD AND PROSTART2 CARD |
| 其它名稱(chēng)： | XE8807AMI026DKR |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)當(dāng)前第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)
Semtech 2006
www.semtech.com
17-7
XE8806A/XE8807A
CascadeCD
CountPWM1
Counter C
mode
Counter D
mode
IrqC
source
IrqD
source
PB(1)
function
0
Counter 8b
Downup: C
Counter 8b
Downup: D
Counter
C
Counter
D
PB(1)
1
0
Counter 16b CD
Downup: C
Counter
CD
-
PB(1)
0
1
PWM 8b
Downup: C
Counter 8b
Downup: D
-
Counter
D
PWM C
1
PWM 10 – 16b CD
Downup: C
-
PWM CD
Table 17-13: Operating modes of the counters C and D
17.9
Counter / Timer mode
The counters in counter / timer mode are generally used to generate interrupts after a predefined number of clock
periods applied on the counter clock input.
Each counter can be set individually either in upcount mode by setting CntXDownUp in the register
RegCntConfig1 or in downcount mode by resetting this bit. Counters A and B can be cascaded to behave as a 16
bit counter by setting CascadeAB in the RegCntConfig1 register. Counters C and D can be cascaded by setting
CascadeCD. When cascaded, the up/down count modes of the counters B and D are defined respectively by the
up/down count modes set for the counters A and C.
When in upcount mode, the counter will start incrementing from zero up to the target value which has been written
in the corresponding RegCntX register(s). When the counter content is equal to the target value, an interrupt is
generated at the next counter clock pulse and the counter is loaded again with the zero value (Figure 17-2).
When in downcount mode, the counter will start decrementing from the initial load value which has been written in
the corresponding RegCntX register(s) down to the zero value. Once the counter content is equal to zero, an
interrupt is generated at the next counter clock pulse and the counter is loaded again with the load value (Figure
17-2).
Be careful to select the counter mode (no capture, not PWM, specify cascaded or not and up or down counting
mode) before writing any target or load value to the RegCntX register(s). This ensures that the counter will start
from the correct initial value. When counters are cascaded, both counter registers must be written to ensure that
both cascaded counters will start from the correct initial values.
The stopping and consecutive starting of a counter in counter mode without a target or load value write operation in
between can generate an interrupt if this counter has been stopped at the zero value (downcount) or at it’s target
value (upcount). This interrupt is additional to the interrupt which has already been generated when the counter
reached the zero or the target value.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XIO2200AGGW | IC PCI-EXPRESS/BUS BRIDGE 176BGA |
| XIO2200AZGW | IC PCI-EXPRESS/BUS BRIDGE 176BGA |
| XPC823ZT81B2T | IC MPU POWERQUICC 81MHZ 256-PBGA |
| XPC8240RZU250E | MCU HOST PROCESSOR 352-TBGA |
| XQ6SLX150T-3CSG484I | IC FPGA SPARTAN-6Q 484-CSBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XE88LC01 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Sensing Machine 16 + 10 bit Data Acquisition Ultra Low-Power Microcontroller |
| XE88LC01MI000 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Sensing Machine 16 + 10 bit Data Acquisition Ultra Low-Power Microcontroller |
| XE88LC01MI027 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Sensing Machine 16 + 10 bit Data Acquisition Ultra Low-Power Microcontroller |
| XE88LC01MI032 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Sensing Machine 16 + 10 bit Data Acquisition Ultra Low-Power Microcontroller |
| XE88LC01RI000 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Sensing Machine 16 + 10 bit Data Acquisition Ultra Low-Power Microcontroller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。