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參數(shù)資料
| 型號(hào)： | XCCACE-TQG144I |
| 廠商： | Xilinx Inc |
| 文件頁(yè)數(shù)： | 38/69頁(yè) |
| 文件大小： | 0K |
| 描述： | IC ACE CONTROLLER CHIP TQ144 |
| 產(chǎn)品變化通告： | XCCACE-TQG144I Discontinuation 31/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 控制器類型： | ACE 控制器 |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 30mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP |
| 供應(yīng)商設(shè)備封裝： | 144-TQFP（20x20） |
| 包裝： | 管件 |
| 其它名稱： | 122-1511-5 |
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System ACE CompactFlash Solution
DS080 (v3.0) April 7, 2014
43
Product Specification
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
Get CompactFlash Lock Control Flow Process
The CompactFlash resource must be arbitrated for before it
can be accessed via the MPU interface. The CompactFlash
arbitration process is shown in Figure 23. A CompactFlash
lock is requested by setting the LOCKREQ bit (bit 1) to a 1
in the CONTROLREG register (MPU address 18h) and poll-
ing the MPULOCK bit (bit 1) in the STATUSREG register
(MPU byte address 04h).
Note that if the CFGLOCK bit (bit 0) in the STATUSREG reg-
ister (MPU byte address 04h) is set, then the CFGJTAG
controller has locked the CompactFlash resource. In this
case, the MPU interface must either wait for the CFGJTAG
interface to release the lock or it can force the lock to be
released. This is done by resetting the CFGJTAG controller
by setting the CFGRESET bit (bit 7) and the FORCELOCK-
REQ bit (bit 0) in the CONTROLREG register (MPU byte
address 18h). The lock request process can be started
again after forcing the CFGJTAG controller to release the
lock.
Figure 23: Get CompactFlash Lock Control Flow Process
CF Locked?
Timer Expired?
Decrement timer
variable
CF is busy.
Return timeout
error.
CF is locked.
Return success.
No
Yes
No
Yes
Write LOCKREQ bit = 1
to byte address 18h
Get CF Lock
Set Lock Control
Initialize timer variable
Get Lock Status
Read MPULOCK bit
from byte address 04h
DS080_49_051701
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