參數(shù)資料
| 型號： | XCCACE-TQG144I |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 23/69頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ACE CONTROLLER CHIP TQ144 |
| 產品變化通告： | XCCACE-TQG144I Discontinuation 31/Oct/2011 |
| 標準包裝： | 60 |
| 控制器類型： | ACE 控制器 |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 30mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP |
| 供應商設備封裝： | 144-TQFP（20x20） |
| 包裝： | 管件 |
| 其它名稱： | 122-1511-5 |
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System ACE CompactFlash Solution
DS080 (v3.0) April 7, 2014
3
Product Specification
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
System ACE CF Controller
The System ACE CF controller manages FPGA configura-
tion data. The controller provides an intelligent interface
between an FPGA target chain and various supported con-
figuration sources; it can target multiple FPGA devices
using JTAG at a selectable throughput of up to 16.7
Mbits/sec. As shown in Figure 3, three interfaces are avail-
able for configuring a target FPGA chain through the Con-
figuration JTAG Port. These interfaces are: CompactFlash,
Microprocessor (MPU), and Test JTAG.
The directory structure used by the System ACE CF con-
troller enables it to support both CompactFlash and Hitachi
Microdrive devices through the CompactFlash port.
The MPU interface has access to the CompactFlash port,
the Configuration JTAG port, and local control/status fea-
tures. The Test JTAG port is used when doing Bound-
ary-Scan testing of the target FPGA chain or the System
ACE CF controller. Details about each interface are dis-
cussed below.
The System ACE CF controller has two main power sup-
plies: the core power supply (VCCL) and a Compact-
Flash/Test JTAG interface power supply (VCCH). The VCCH
power source supplies the Test JTAG and CompactFlash
port levels. These two interfaces must be powered at 3.3V.
The VCCL core power source supplies the MPU and Config-
uration JTAG ports, which can be run at 3.3V or 2.5V. It is
important to note that the MPU and Configuration JTAG
interfaces are always powered at the same voltage. Consid-
erations for the interface voltage are discussed in Typical
Figure 3: System ACE CF Controller Block Diagram
DS080_04_030801
CompactFlash Port
MPU
P
o
rt
T
est
JT
A
G
(TSTJT
A
G)
P
o
rt
Configuration JTAG (CFGJTAG) Port
Configuration
JTAG Controller
CompactFlash
Arbiter
MPU
Control
and
Status
CompactFlash
Controller
Misc.
(LEDs,
etc.)
Test Scan
JTAG
Interface
(Target FPGA Chain)
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