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參數(shù)資料
| 型號： | W25Q64BVZEIP |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 8M X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 8 X 6 MM, GREEN, WSON-8 |
| 文件頁數(shù)： | 36/61頁 |
| 文件大?。?/td> | 1726K |
| 代理商： | W25Q64BVZEIP |
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W25Q64BV
Publication Release Date: July 08, 2010
- 41 -
Revision E
11.2.23 Power-down (B9h)
Although the standby current during normal operation is relatively low, standby current can be further
reduced with the Power-down instruction. The lower power consumption makes the Power-down
instruction especially useful for battery powered applications (See ICC1 and ICC2 in AC Characteristics).
The instruction is initiated by driving the /CS pin low and shifting the instruction code “B9h” as shown in
figure 23.
The /CS pin must be driven high after the eighth bit has been latched. If this is not done the Power-down
instruction will not be executed. After /CS is driven high, the power-down state will entered within the time
duration of tDP (See AC Characteristics). While in the power-down state only the Release from Power-
down / Device ID instruction, which restores the device to normal operation, will be recognized. All other
instructions are ignored. This includes the Read Status Register instruction, which is always available
during normal operation. Ignoring all but one instruction makes the Power Down state a useful condition
for securing maximum write protection. The device always powers-up in the normal operation with the
standby current of ICC1.
Figure 23. Deep Power-down Instruction Sequence Diagram
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