參數(shù)資料
型號: W25P80-VSFI-G
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 8M X 1 FLASH 2.7V PROM, PDSO16
封裝: 0.300 INCH, GREEN, PLASTIC, SOIC-16
文件頁數(shù): 22/43頁
文件大小: 918K
代理商: W25P80-VSFI-G
W25P80 / W25P16 / W25P32
Publication Release Date: December 11, 2005
- 29 -
Revision J
9.2.17 Program Parameter Page (52h)
The Program Parameter Page instruction allows up to 256 bytes (128 words) to be programmed at
memory word locations that have been previously erased to all 1s “FFFFh” (see Erase Parameter
Page instruction). A Write Enable instruction must be executed before the device will accept the
Program Parameter Page instruction (Status Register bit WEL must equal 1). The instruction is
initiated by driving the /CS pin low then shifting the instruction code “52h” followed by a 24-bit address
(A23-A0) and the full 256 data bytes, into the DI pin. Only the lower 8 address bits (A7-A0) are used,
the 16 upper most address bit (A23-A8) are ignored (don’t care). Because the W25P80/16/32
programs in increments of one word (two bytes) at a time, the address must be an even address (A0
must equal 0). The /CS pin must be held low for the entire length of the instruction while data is being
sent to the device. The Program Parameter Page instruction sequence is shown in figure 20.
The start address of the needs to be set to 00h on the Parameter Page. If more than 256 bytes are
sent to the device the addressing will wrap to the beginning of the page. If previously written data
bytes are over-written the data will not be valid.
In most applications it is best to read the full 256-byte contents of the page into a temporary RAM.
Data can then be modified as needed and the entire 256 bytes can then be reprogrammed into the
Parameter Page at one time.
As with the write and erase instructions, the /CS pin must be driven high after the eighth bit of the last
byte has been latched. If this is not done the Parameter Page Program instruction will not be
executed. After /CS is driven high, the self-timed Page Program instruction will commence for a time
duration of tPP (See AC Characteristics). While the Page Program cycle is in progress, the Read
Status Register instruction may still be accessed for checking the status of the BUSY bit. The BUSY
bit is a 1 during the program cycle and becomes a 0 when the cycle is finished and the device is ready
to accept other instructions again. After the program cycle has finished the Write Enable Latch (WEL)
bit in the Status Register is cleared to 0. The Program Parameter Page instruction will not be executed
if the addressed page is protected by the Block Protect (BP2, BP1, BP0) bits (see Status Register
Memory Protection table).
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