
31
User’s Manual U14046EJ3V0UD
LIST OF TABLES (1/3)
Table No.
Title
Page
1-1
Correspondence Between Mask ROM Versions and Flash Memory Versions ....................................
54
1-2
Differences Between Standard Grade Products and Special Grade Products ....................................
54
1-3
Correspondence Between Products and Packages ............................................................................
55
1-4
Mask Options of Mask ROM Versions .................................................................................................
55
2-1
Correspondence Between Mask ROM Versions and Flash Memory Versions ....................................
74
2-2
Differences Between Standard Grade Products and Special Grade Products ....................................
75
2-3
Correspondence Between Products and Packages ............................................................................
75
2-4
Mask Options of Mask ROM Versions .................................................................................................
76
3-1
Pin I/O Circuit Types ............................................................................................................................
85
4-1
Pin I/O Circuit Types ............................................................................................................................
97
5-1
Internal ROM Capacity ........................................................................................................................
106
5-2
Vector Table .........................................................................................................................................
107
5-3
Internal High-Speed RAM Capacity .....................................................................................................
108
5-4
Internal High-Speed RAM Area ...........................................................................................................
115
5-5
Special Function Register List .............................................................................................................
120
6-1
Port Functions (
PD780024A, 780034A Subseries) ............................................................................ 137
6-2
Port Functions (
PD780024AY, 780034AY Subseries) ........................................................................ 138
6-3
Port Configuration ................................................................................................................................
139
6-4
Pull-Up Resistor of Port 3 (
PD780024A, 780034A Subseries) .......................................................... 145
6-5
Pull-Up Resistor of Port 3 (
PD780024AY, 780034AY Subseries) ...................................................... 150
6-6
Port Mode Registers and Output Latch Settings When Alternate Function Is Used ............................
163
6-7
Comparison Between Mask ROM Version and Flash Memory Version ...............................................
168
7-1
Clock Generator Configuration ............................................................................................................
169
7-2
Relationship Between CPU Clock and Minimum Instruction Execution Time ......................................
173
7-3
Maximum Time Required for CPU Clock Switchover ..........................................................................
182
8-1
Configuration of 16-Bit Timer/Event Counter 0 ....................................................................................
185
8-2
CR00 Capture Trigger and Valid Edges of TI00 and TI01 Pins ...........................................................
186
8-3
CR01 Capture Trigger and Valid Edge of TI00 Pin (CRC02 = 1) .........................................................
187
9-1
Configuration of 8-Bit Timer/Event Counters 50, 51 ............................................................................
221
10-1
Watch Timer Configuration ..................................................................................................................
243
10-2
Interval Timer Interval Time .................................................................................................................
245