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參數(shù)資料
| 型號： | TMS418169P-80 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 1048576-WORD BY 16-BIT EXTENDED DATA OUT HIGH-SPEED DRAMS |
| 中文描述： | 1048576字由16位擴(kuò)充數(shù)據(jù)輸出高速DRAM等 |
| 文件頁數(shù)： | 30/67頁 |
| 文件大?。?/td> | 1464K |
| 代理商： | TMS418169P-80 |
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TMS55160, TMS55161, TMS55170, TMS55171
262144 BY 16-BIT MULTIPORT VIDEO RAMS
SMVS464
–
MARCH1996
30
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
split-register-transfer read (continued)
QSF indicates which half of the register is being accessed during serial-access operation. When QSF is low,
the serial-address pointer is accessing the lower (least significant) 128 bits of SAM. When QSF is high, the
pointer is accessing the higher (most significant) 128 bits of SAM. QSF changes state upon completing a
full-register-transfer read cycle. The tap point loaded during the current transfer cycle determines the state of
QSF. QSF also changes state when a boundary between two register halves is reached.
RAS
CASx
DSF
TRG
QSF
SC
Tap
Point N
td(GHQSF)
Full-Register-Transfer Read
With Tap Point N
Split-Register-
Transfer Read
td(CLQSF)
NOTE A: See
“
timing requirements over recommended ranges of supply voltage and operating free-air temperature
”
table.
Figure 23. Example of a Split-Register-Transfer Read After a Full-Register-Transfer Read
127
or 255
td(SCQSF)
RAS
CASx
DSF
TRG
QSF
SC
Tap
Point N
Split-Register-
Transfer Read
With Tap Point N
Split-Register-
Transfer Read
td(MSRL)
td(RHMS)
NOTE A: See
“
timing requirements over recommended ranges of supply voltage and operating free-air temperature
”
table.
Figure 24. Example of Successive Split-Register-Transfer Read Operations
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