參數(shù)資料
型號(hào): TMS320F28335_1
廠商: Texas Instruments, Inc.
英文描述: Variable Capacitance Diode for TV Tuner VHF Tuning; Ratings VR (V): 32; Characteristics n: 12.0 min; Characteristics rs (ohm) max: 0.85; Characteristics C (pF) max: C2 = 32.2 to 37.5 C25 = 2.57 to 3.0; Characteristics CVR/CVR: 2/25; Cl: 2.777; Package: UFP
中文描述: 數(shù)字信號(hào)控制器(DSC)
文件頁數(shù): 42/166頁
文件大?。?/td> 1889K
代理商: TMS320F28335_1
www.ti.com
A
3.2.10 Security
TMS320F28335, TMS320F28334, TMS320F28332
Digital Signal Controllers (DSCs)
SPRS439B–JUNE 2007–REVISED OCTOBER 2007
Table 3-6. Boot Mode Selection
MODE
F
E
D
C
B
A
9
8
7
6
5
4
3
2
1
GPIO87/XA15
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
GPIO86/XA14
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
GPIO85/XA13
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
GPIO84/XA12
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
MODE
(1)
Jump to Flash
SCI-A boot
SPI-A boot
I2C-A boot
eCAN-A boot
McBSP-A boot
Jump to XINTF x16
Jump to XINTF x32
Jumpto OTP
Parallel GPIO I/O boot
Parallel XINTF boot
Jump to SARAM
Branch to check boot mode
Branch to Flash, skip ADC calibration
Branch to SARAM, skip ADC
calibration
Branch to SCI, skip ADC calibration
0
0
0
0
0
(1)
All four GPIO pins have an internal pullup.
NOTE
Modes 0, 1, and 2 in
Table 3-6
are for TI debug only. Skipping the ADC calibration
function in an application will cause the ADC to operate outside of the stated
specifications
The F2833x devices support high levels of security to protect the user firmware from being reverse
engineered. The security features a 128-bit password (hardcoded for 16 wait-states), which the user
programs into the flash. One code security module (CSM) is used to protect the flash/OTP and the
L0/L1/L2/L3 SARAM blocks. The security feature prevents unauthorized users from examining the
memory contents via the JTAG port, executing code from external memory or trying to boot-load some
undesirable software that would export the secure memory contents. To enable access to the secure
blocks, the user must write the correct 128-bit KEY value, which matches the value stored in the password
locations within the Flash.
In addition to the CSM, the emulation code security logic (ECSL) has been implemented to prevent
unauthorized users from stepping through secure code. Any code or data access to flash, user OTP, L0,
L1, L2 or L3 memory while the emulator is connected will trip the ECSL and break the emulation
connection. To allow emulation of secure code, while maintaining the CSM protection against secure
memory reads, the user must write the correct value into the lower 64 bits of the KEY register, which
matches the value stored in the lower 64 bits of the password locations within the flash. Note that dummy
reads of all 128 bits of the password in the flash must still be performed. If the lower 64 bits of the
password locations are all ones (unprogrammed), then the KEY value does not need to match.
When initially debugging a device with the password locations in flash programmed (i.e., secured), the
emulator takes some time to take control of the CPU. During this time, the CPU will start running and may
execute an instruction that performs an access to a protected ECSL area. If this happens, the ECSL will
trip and cause the emulator connection to be cut. Two solutions to this problem exist:
1. The first is to use the Wait-In-Reset emulation mode, which will hold the device in reset until the
emulator takes control. The emulator must support this mode for this option.
2. The second option is to use the “Branch to check boot mode” boot option. This will sit in a loop and
Functional Overview
42
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