參數(shù)資料
型號： TMS320F28335_1
廠商： Texas Instruments, Inc.
英文描述： Variable Capacitance Diode for TV Tuner VHF Tuning; Ratings VR (V): 32; Characteristics n: 12.0 min; Characteristics rs (ohm) max: 0.85; Characteristics C (pF) max: C2 = 32.2 to 37.5 C25 = 2.57 to 3.0; Characteristics CVR/CVR: 2/25; Cl: 2.777; Package: UFP
中文描述： 數(shù)字信號控制器（DSC）
文件頁數(shù)： 148/166頁
文件大小： 1889K
代理商： TMS320F28335_1
www.ti.com
A
XCLKOUT
(/1 Mode)
XHOLD
XZCS0, XZCS6, XZCS7
XD[31:0], XD[15:0]
Valid
XHOLDA
t
d(HL-Hiz)
t
d(HH-HAH)
High-Impedance
XA[19:0]
Valid
Valid
High-Impedance
t
d(HH-BV)
t
d(HL-HAL)
(A)
(B)
XR/W
TMS320F28335, TMS320F28334, TMS320F28332
Digital Signal Controllers (DSCs)
SPRS439B–JUNE 2007–REVISED OCTOBER 2007
On a reset (XRS), the HOLD mode bit is set to 0. If the XHOLD signal is active low on a system reset, the
bus and all signal strobes must be in high-impedance mode, and the XHOLDA signal is also driven active
low.
When HOLD mode is enabled and XHOLDA is active low (external bus grant active), the CPU can still
execute code from internal memory. If an access is made to the external interface, the CPU is stalled until
the XHOLD signal is removed.
An external DMA request, when granted, places the following signals in a high-impedance mode:
XA[19:0]
XD[31:0], XD[15:0]
XWE0, XWE1, XRD
XR/W
XZCS0
XZCS6
XZCS7
All other signals not listed in this group remain in their default or functional operational modes during these
signal events.
Table 6-49. XHOLD/XHOLDA Timing Requirements (XCLKOUT = XTIMCLK)
(1)(2)
MIN
MAX
4t
c(XTIM)
5t
c(XTIM)
3t
c(XTIM)
4t
c(XTIM)
UNIT
ns
ns
ns
ns
t
d(HL-HiZ)
t
d(HL-HAL)
t
d(HH-HAH)
t
d(HH-BV)
Delay time, XHOLD low to Hi-Z on all address, data, and control
Delay time, XHOLD low to XHOLDA low
Delay time, XHOLD high to XHOLDA high
Delay time, XHOLD high to bus valid
(1)
When a low signal is detected on XHOLD, all pending XINTF accesses will be completed before the bus is placed in a high-impedance
state.
The state of XHOLD is latched on the rising edge of XTIMCLK.
(2)
A.
B.
All pending XINTF accesses are completed.
Normal XINTF operation resumes.
Figure 6-29. External Interface Hold Waveform
148
Electrical Specifications
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