參數(shù)資料
型號: TMS320F28335_1
廠商: Texas Instruments, Inc.
英文描述: Variable Capacitance Diode for TV Tuner VHF Tuning; Ratings VR (V): 32; Characteristics n: 12.0 min; Characteristics rs (ohm) max: 0.85; Characteristics C (pF) max: C2 = 32.2 to 37.5 C25 = 2.57 to 3.0; Characteristics CVR/CVR: 2/25; Cl: 2.777; Package: UFP
中文描述: 數(shù)字信號控制器(DSC)
文件頁數(shù): 139/166頁
文件大?。?/td> 1889K
代理商: TMS320F28335_1
www.ti.com
A
TMS320F28335, TMS320F28334, TMS320F28332
Digital Signal Controllers (DSCs)
SPRS439B–JUNE 2007–REVISED OCTOBER 2007
will be with respect to the falling edge of XCLKOUT.
Examples:
XRDH
XWEH
XRD inactive high
XWE1 or XWE0 inactive high
Strobes that change at the end of the access will align to the rising edge of XCLKOUT if the total
number of lead + active + trail XTIMCLK cycles (including hardware waitstates) is even. If the number
of lead + active + trail XTIMCLK cycles (including hardware waitstates) is odd, then the alignment will
be with respect to the falling edge of XCLKOUT.
Examples:
XZCSH
XRNWH
Zone chip-select inactive high
XR/W inactive high
6.10.7.5
External Interface Read Timing
Table 6-39. External Interface Read Timing Requirements
MIN
MAX
UNIT
ns
ns
ns
ns
t
a(A)
t
a(XRD)
t
su(XD)XRD
t
h(XD)XRD
Access time, read data from address valid
Access time, read data valid from XRD active low
Setup time, read data valid before XRD strobe inactive high
Hold time, read data valid after XRD inactive high
(LR + AR) –16
(1)
AR –14
(1)
14
0
(1)
LR = Lead period, read access. AR = Active period, read access. See
Table 6-37
.
Table 6-40. External Interface Read Switching Characteristics
PARAMETER
Delay time, XCLKOUT high to zone chip-select active low
Delay time, XCLKOUT high/low to zone chip-select inactive high
Delay time, XCLKOUT high to address valid
Delay time, XCLKOUT high/low to XRD active low
Delay time, XCLKOUT high/low to XRD inactive high
Hold time, address valid after zone chip-select inactive high
Hold time, address valid after XRD inactive high
MIN
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
t
d(XCOH-XZCSL)
t
d(XCOHL-XZCSH)
t
d(XCOH-XA)
t
d(XCOHL-XRDL)
t
d(XCOHL-XRDH
t
h(XA)XZCSH
t
h(XA)XRD
1
3
2
1
1
–2
–2
(1)
(1)
(1)
During inactive cycles, the XINTF address bus always holds the last address put out on the bus. This includes alignment cycles.
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Electrical Specifications
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