參數(shù)資料
型號: TLC320AD52C
廠商: Texas Instruments, Inc.
英文描述: Sigma-Delta Analog Interface Circuits With Master-Slave Function(帶主從功能的∑△模擬接口電路,高分辨率信號轉(zhuǎn)換)
中文描述: sigma - delta模擬接口電路的主從功能(帶主從功能的Σ△模擬接口電路,高分辨率信號轉(zhuǎn)換)
文件頁數(shù): 34/59頁
文件大?。?/td> 306K
代理商: TLC320AD52C
3–4
Data (D0 = 1)
DIN
FS
Register
Read/Write
Data (D0 = 0)
Secondary Communication
Request
NOTE: See figure 3–8 for secondary communication DIN data format
No Secondary Communication
Request
P
S
P
Figure 3–5. FS Output During Software Secondary Serial Communication Request (No Slave)
3.3
The SCLK frequency is set equal to the frequency of the frame-sync signal (FS) multiplied by 256. The
conversion rate or sample rate is equal to the frequency of FS.
Conversion Rate Versus Serial Port
3.4
Phone mode control is provided for applications that need hardware control and monitoring of external
events. By allowing the device to drive the FLAG terminal (set through control 2 register), the host DSP is
capable of system control through the same serial port that connects the device. Along with this control is
the capability of monitoring the value of the ALTDATA terminal during a secondary communication cycle.
One application for this function is in monitoring RING DETECT or OFFHOOK DETECT from a phone
answering system. FLAG allows response to these incoming control signals. Figure 3–6 shows the timing
associated with this operating mode.
Phone Mode Control
DOUT
(see Note A)
FS
Register Data
(8-Bits)
P
S
8-Bits
16-Bits
DOUT
(see Note B)
ALTDATA
NOTES: A. When DIN performs a read operation (set D13 to 1) during secondary communication.
B. When DIN perform a write operation (set D13 to 0) during secondary communication.
Figure 3–6. Phone Mode Timing When Phone Mode is Enabled
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TLC320AD55C Sigma-Delta Analog Interface Circuit(Sigma-Delta 模擬接口)
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