參數(shù)資料
型號(hào): TLC320AD52C
廠商: Texas Instruments, Inc.
英文描述: Sigma-Delta Analog Interface Circuits With Master-Slave Function(帶主從功能的∑△模擬接口電路,高分辨率信號(hào)轉(zhuǎn)換)
中文描述: sigma - delta模擬接口電路的主從功能(帶主從功能的Σ△模擬接口電路,高分辨率信號(hào)轉(zhuǎn)換)
文件頁數(shù): 23/59頁
文件大?。?/td> 306K
代理商: TLC320AD52C
2–9
2.7.1
The frame sync is generated internally and goes low on the rising edge of SCLK and remains low during
a 16-bit data transfer. In addition to generating its own frame-sync signal, the master also outputs a frame
sync for each slave that is being used (see figures 2–8 and 2–9).
Frame Sync (FS) Function, Master Mode
FS
(see Note A)
DIN/DOUT
16 SCLKs
16 SCLKs
Primary
Secondary
Primary
128 SCLKs
256 SCLKs
SCLK
Primary
Primary
FS
(see Note B)
NOTES: A. Primary and secondary serial communication.
B. Primary serial communication, only.
Figure 2–8. Master Device Frame-Sync Signal With Primary and Secondary Communications
(No Slaves)
FS
(see Note A)
MP
128 SCLKs
256 SCLKs
SCLK
FS
(see Note B)
Delay is mShift Clock
(see Note C)
MP
SP
MS
SP
SS
MP
NOTE: MP: Master Primary (master device data is transferred in this period, DOUT of the slave device device is in high
impedance state).
SP: Slave Primary (slave device data is transferred in this period, DOUT of master device device is in high
impedance state).
MS: Master Secondary (master device control register information is transferred in this period, DOUT of the slave
device is in high impedance state).
SS: Slave Secondary(slave device control register information is transferred in this period, DOUT of the master
device is in high impedance state).
NOTES: A. Primary and secondary serial communications
B. Primary serial communication only
C. mis the value programmed into the FSD register (control register 3: D0–D5)
Figure 2–9. Master Device Frame-Sync Signal With Primary and Secondary Communications
(With 1 Slave Device)
相關(guān)PDF資料
PDF描述
TLC320AD55C Sigma-Delta Analog Interface Circuit(Sigma-Delta 模擬接口)
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TLC320AD56C Sigma-Delta Analog Interface Circuit
tlc320ad56c Sigma-Delta Analog Interface Circuit(Sigma-Delta 模擬接口電路)
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