參數(shù)資料
型號: TLC320AD52C
廠商: Texas Instruments, Inc.
英文描述: Sigma-Delta Analog Interface Circuits With Master-Slave Function(帶主從功能的∑△模擬接口電路,高分辨率信號轉(zhuǎn)換)
中文描述: sigma - delta模擬接口電路的主從功能(帶主從功能的Σ△模擬接口電路,高分辨率信號轉(zhuǎn)換)
文件頁數(shù): 33/59頁
文件大?。?/td> 306K
代理商: TLC320AD52C
3–3
3.2.1
The FC requests a secondary communication when it is asserted. The FC terminal is latched at the rising
edge of FS (primary communication), so FC should be pulled high before the rising edge of the primary frame
sync (FS). Figures 3–3 and 3–4 show the FS output from a master device.
Hardware Secondary Serial Communication Request
ADC Data Out
FC
DOUT
DIN
FS
Register
Read/Write
ADC Data Out
DAC Data In
Register
Read/Write
DAC Data In
Secondary
Request
No Secondary
Request
P
P
S
Figure 3–3. FS Output When Hardware Secondary Serial Communication Is Requested Only
Once (No Slave)
FS
(Master)
FC
(See Note)
S1
S2
S3
M
S1
S2
S3
M
M
P
P
P
P
S
S
S
S
P
NOTE: FC of master device and slave devices should connect together
Figure 3–4. FS Output When Hardware Secondary Serial Communication Is Requested Only
Once (Three Slaves)
3.2.2
The LSB of the DAC data within a primary transfer can request a secondary communication when the device
is in the 15-bit mode.
Software Secondary Serial Communication Request
For all serial communications, the most significant bit is transferred first. For a 16-bit ADC word and a 16-bit
DAC word, D15 is the most significant bit and D0 is the least significant bit. For a 15-bit DAC data word in
a primary communication, D15 is the most significant bit and D1 is the least significant bit. Bit D0 is then used
for the secondary communication request control. All digital data values are in 2’s complement data format
(figure 3–5).
If the data format is set to the 16-bit word mode, all 16 bits are either ADC or DAC data and secondary
communication can then be requested only by hardware (FC terminal).
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